Showing papers by "NEC published in 1985"

Process for fabricating three-dimensional semiconductor device

Abstract: A process of fabricating a three-dimensional semiconductor device, comprising the steps of preparing at least two multilayer structures each including at least one semiconductor element and a conductor connected at one end to the semiconductor element and having at the other end an exposed surface, at least one of the multilayer structures further including a thermally fusible insulating adhesive layer having a surface coplanar with the exposed surface of the conductor, positioning the multilayer structures so that the exposed surfaces of the respective conductors of the multilayer structures are spaced apart from and aligned with each other, moving at least one of the multilayer structures with respect to the other until the exposed surfaces of the conductors of the multilayer structures contact each other, and heating the multilayer structures for causing the insulating adhesive layer of at least one of the multilayer structures to thermally fuse to the other multilayer structure with the semiconductor elements electrically connected together.

A CMOS 8-Bit High-Speed A/D Converter IC

Abstract: A novel high-speed low-power CMOS balanced comparator circuit is proposed and implemented in an 8M fully parallel analog-to-digital (A/D) converter IC. A 20-MHz sampling rate with 350-mW power dissipation from a single 5-V power supply has been realized. Integral linearity of /spl plusmn/ 1/2 LSB to 8-bit conversion has been achieved through intensive transistor dimension optimization applied to the comparator circuit, instead of employing an offset canceling technique.

Room-temperature CW operation of AlGaInP double-heterostructure visible lasers

Abstract: Room-temperature continuous-wave (CW) operation of (Al0.4Ga0.6)0.5In0.5P/Ga0.5In0.5P/(Al0.4Ga0.6)0.5In0.5P double-heterostructure visible semiconductor lasers has been achieved for the first time. CW operation is obtained up to 50° C. The threshold current at 25° C is mA (4.1 kA/cm2). The lasing wavelength is 689.7 nm.

Ink jet printer having an eccentric head guide shaft for cleaning and sealing nozzle surface

Abstract: An ink jet printer is disclosed wherein an ink writing head is reprocably movably mounted on an eccentric guide shaft to scan a print line during print mode and moved to a cleaning position outside the print line during non-print mode. A nozzle cleaning device movably supports a liquid-absorbing cleaning tape along a path parallel to and adjacent to the nozzle surface. A drive system turns the guide shaft about the eccentric axis thereof and moves the cleaning tape during the non-print mode so that the nozzle surface moves in a substantially circular path to permit a section of the tape to provide a wiping action over the nozzle surface. A nozzle sealing device is arranged to make contact with the nozzle surface when the latter is moving in the circular path and held in pressure tight contact with the nozzle surface after the drive system is de-energized.

Automatic call transfer system capable of carrying out call transfer without manual operation

Abstract: In an automatic call transfer system for use in carrying out transfer of a terminating call from one of telephone sets (T) to another through an exchange (11), a person identification number (ID) is assigned to each of persons movable in a limited area and is generated from a transmitter (TX) conveyed by each person. The limited area is divided into a plurality of zones (Z) which are defined by receivers (RX) connected through subscriber lines to the exchange, respectively, and which include at least one of the telephone sets, respectively. The person identification number is produced from a transmitter (TX) conveyed by each person and is received by a selected one of the receivers in the zone for the selected receiver to be sent through one of the subscriber lines (L) to the exchange. A line number of the one subscriber line is memorized in a memory of the exchange in correspondence to the person identification number and is changed as each person moves in the limited area. Responsive to the terminating call carrying the person identification number, the exchange searches the memory to detect the line number memorized therein and to transfer the terminating call to one of the telephone sets indicated by the memorized line number.

Method of transmitting terminating call signals within a restricted duration and a base station and a portable unit for use in the same

Abstract: A portable unit that may be called from a base station through a radio control channel by a succession of terminating call signals that is sent through the control channel from the base station to the portable unit for a first or restricted time duration (T1), selected in consideration of a battery saving period of a battery saving operation carried out in the portable unit. Within the battery saving period, the portable unit is put into transient active and inactive states during a first time interval and a second time interval, respectively. Selection is made so that the first time duration is longer than the second time interval to receive at least one of the terminating call signals within the first time duration in the portable unit. The base station monitors an acknowledgement signal for a second time duration (T2) after the lapse of the first time duration and interrupts the control channel when the acknowledgement signal is not received within the first and the second time durations. In the portable unit, the battery saving operation is released when the presence of the terminating call signals is detected by a squelch circuit.

A1N Substrates with High Thermal Conductivity

Abstract: A new aluminum nitride (AIN) substrate, which has high thermal conductivity of 160 W/mK at room temperture, has been developed using the hot press sintering technique. The new AIN substrate has the following excellent characteristics. 1) The thermal conductivity is eight times as high as that of AI 2 O 3 at room temperature and is almost equal to that of 99.5 percent BeO at 150°C. 2) The thermal expansion coefficient is smaller than that of AI 2 O 3 and BeO, and is close to that of a silicon semiconductor chip. 3) The electrical properties are almost as good as those for AI 2 O 3 and BeO in the wide frequency range. 4) It not only has higher mechanical stength but also easier machinable property than AI 2 O 3 . It is characterized by its light transparency from visible light to the infrared wavelength region. It was proved that the new AIN substrate is able to be metallized with good adhesion strength by the conventional evaporating method and the conventional sputtering method. The new AIN was found to be applicable to three kinds of semiconductor devices: 1) silicon epitaxial transistor, 2) GaAIAs light emitting diode, and 3) InGaAsP laser diode. Also, another AIN substrate was developed using the normal sintering technique, which has high thermal conductivity of 140 W/mK at room temperature.

Identification system employing verification of fingerprints

Abstract: An identification system for identifying authorized personnel compares a streaked pattern of a fingerprint of an individual with selected fingerprint patterns stored in memory of all authorized personnel in order to determine if the individual is included among the authorized personnel. The streaked pattern is compared with the fingerprint patterns stored in memory on the basis of characteristics between a reference point of a fingerprint and its relationship to other selected points of the fingerprint.

Packaging technology for the NEC SX-3 supercomputers

Abstract: Technological considerations in realizing high-speed supercomputers are presented, focusing on large-scale integrated (LSI) chips, new circuit packaging technology, and a liquid cooling system. The Model SX-1 and SX-2 supercomputers employ a new circuit packaging technology achieving up to 1300 megaflops processing speeds with a 6-ns machine cycle. This new technology features a 1000-gate current mode logic (CML) LSI with 250 ps gate delay as a logic element, a I k bit bipolar memory with 3.5 ns access time for cache memory and vector registers, a 10 cm² multilayer ceramic substrate with thin film fine lines (25- \mu m width, 75- \mu m center-to-center), and a multichip package which contains up to 36 000 logic gates. A liquid cooling module is implemented for highdensity high-efficiency heat-conductive packaging for the arithmetic processor, in addition, high-density high-speed packaging of 64 kbit static metal-oxide semiconductor (MOS) RAM's are used to implement large-capacity fast main memory.

Distributed-feedback semiconductor laser

Abstract: The distributed-feedback (DFB) semiconductor laser diode comprises an active layer (12) emitting light rays upon injection of an electric current; and an optical waveguide (20) adjoining the active layer, for guiding the light rays together with the active layer (12). The optical waveguide (20) comprises a first semiconductor layer (13) formed in the vicinity of the active layer (12) and having a greater bandgap than that of the active layer (12), whose thickness varies in a corrugation of a prescribed cycle in the direction of the active layer (12), and a second semiconductor layer (14) having a bandgap smaller than that of the first semiconductor layer (13), but greater than that of the active layer (12), and so formed as to confirm the corrugation of the first semiconductor layer (13). First and second cladding layers adjoin the active layer (12) and the optical waveguide (20), respectively, and have bandgaps greater than those of the active layer (12) and of the second semiconductor layer (14). First and second electrodes inject an electric current into the active layer (12) in which a PN junction is formed by forward biasing. Light rays emitted from the active layer (12) interact with the diffraction grating formed by the boundary of the corrugation to receive positive feedback, resulting in laser oscillation in a single longitudinal mode (Fig. 1C).

Portable radio communication apparatus comprising an antenna member for a broad-band signal

Abstract: of the Disclosure: In a portable radio communication apparatus comprising a handset (20) having a side surface (23) and a recessed surface (24), first and second antennae (51 and 52) of different resonance frequencies are fixed to the recessed surface by first and second conductive plates (55 and 56), respectively. First and second conductive lines (61 and 62) connect a common conductive line (63) to the first and the second antennae, respec-tively. The common conductive line is connected to an electro-audio and audio-electro converting device (30) to feed a transmitting electric signal to the first and the second antennae and to receive the received electric signal from the first and the second antennae. The first and the second antennae have first and second antenna widths (W1 and W2), respectively. The first and the second conductive plates have first and second plate widths, respectively, and first and second axes centrally of the first and the second plate widths, respectively. The first and the second plate widths are not greater than the first and the second antenna widths, respectively. The first and the second axes are spaced wider than a half of a sum of the first and the second antenna widths. (Fig. 6)

Real time processor for video signals

Abstract: This is a real time video signal processor for real time digital processing of video signals with a plurality of unit processors. All the unit processors are connected in parallel between an input bus and an output bus. Each unit processor consists of an input section connected to the input bus, a processing section for digital processing of video signals written into the input section, and an output section for supplying video signals processed by the processing section to the output bus. There is provided control sections for generating control signals to command what picture block of each frame is to be written into each unit processor and what picture block of each processed frame is to be outputted. Generally, each unit processor takes in a greater picture block than the picture block to be processed, and each processor independently accomplishes digital processing of the picture block assigned to it without communicating with any other unit processor.

Capacitor built-in integrated circuit packaged unit and process of fabrication thereof

Abstract: A capacitor built-in integrated circuit packaged unit comprising an electrically conductive support member, first and second lead elements associated with the conductive support member, a stack of a plurality of layers comprising a first insulating layer of a highly dielectric material formed on the conductive support member, an electrically conductive layer on the first insulating layer, and a second insulating layer on the conductive layer, the conductive layer having a portion exposed by the second insulating layer, a semiconductor integrated circuit chip having first and second electrodes which are electrically isolated from each other, the second insulating layer intervening between the conductive layer and the semiconductor integrated circuit chip, a bonding wire electrically connecting the first electrode to the first lead element, and a bonding wire electrically connecting the second electrode to the exposed portion of the conductive layer and to the second lead element. The dielectric material forming the first insulating layer provides a capacitor between the first and second electrodes on the semiconductor integrated circuit chip.

Influence of Conductor Shields on the Q-Factors of a TE /sub 0/ Dielectric Resonator

Abstract: Two approaches due to the complex frequency and to the perturbation theory are described to compute accurately the Q-factors of the circularly-symmetric TEO modes for dielectric rod resonators placed between two parallel conductor plates and in a conductor cavity. These techniques allow us to estimate separately the Q-factors due to radiation, conductor, and dielectric losses from only the computation of resonant frequencies by means of the mode-matching method. Validity of the theories is verified by experiments. The influence of the conductor shields on the Q-factors is discussed from the computed results. A possibility of realizing high-Q dielectric resonators is suggested.

Contact type image sensor and driving method therefor

Abstract: A contact type image sensor comprising M x N of photodetectors arranged in line and M driving integrated circuits each of which includes a CCD shift register having N stages connected through one transfer gate to the corresponding one of the photodetectors. Each of the driving circuits also has an output amplifier connected to the associated CCD shift register and a switch connected between the output amplifier and a common output line. When all the transfer gates are simultaneously turned on, a photoelectric charge stored in each photodetector is transferred to the corresponding stages of the CCD shift register, and then sequentially read out from the respective CCD shift register by supplying transfer clock pulses to a selected CCD shift register while turning on the switch associated to the selected CCD shift register.

Erasable, programmable read-only memory device

Abstract: An erasable, programmable read-only memory device comprises a plurality of memory cells of channel injection type. First and second impurity regions used as source and drain have different configurations such that when the same level of voltages are applied to first and second impurity regions, respectively, the intensity of electric field near the channel region in the depletion layer between the second impurity region and the substrate is weaker than that in the depletion layer between the first impurity region and the substrate. In the writing operation, a higher voltage in absolute value is applied to the first impurity region and channel current flows in one direction. Therefore, hot electrons can be effectively injected into the floating gate near the first impurity region. On the other hand in the reading operation, a higher voltage in absolute value is applied to the second impurity region and channel current flows in the opposite direction. The voltage in the reading operation is lower in absolute value than the voltage in the writing operation. According to such a device, the unintentional injection writing phenomenon in the reading operation can be suppressed.

Code converting system and method for band compression of digital signals

Abstract: A code converting system for converting a digital signal having a given number of bits into a digital signal having a different number of bits, which selectively alters the encoding method depending on the nature of the input to the system. The system includes a variable length encoder; a run-length encoder; a multiplexer for selecting as its output either the variable length code or the run-length code; a buffer memory for receiving and storing the output of the multiplexer, supplying it to a transmission line, and generating a signal indicative of the level of memory occupancy of the buffer memory; and control means for controlling the multiplexer so as to output only variable length code when the memory occupancy is below a first predetermined level. The control means further comprises an underflow signal generator for generating a signal indicative of when the memory occupancy is less than the first predetermined level. The underflow signal is supplied to a gate, which transfers it as a selection signal to control the multiplexer so as to output only said variable length code when such underflow occurs. In the absence of an underflow indication signal, the gate is enabled to pass the input code, to the run-length encoder to be converted into a run-length code. The control means is also adjustable so as to control the level of memory occupancy of the buffer memory.

Non-linear device for driving liquid crystal display

Abstract: A non-linear device used for driving a liquid crystal display is disclosed. This non-linear device comprises a first amorphous silicon layer, an insulator film deposited on the first silicon layer and a second amorphous silicon layer deposited on said insulator film. The insulator film may be made of silicon oxide or silicon nitride. The non-linear device thus has an SIS structure.

Memory circuit having a plurality of cell arrays

Abstract: A semiconductor memory circuit which can operate with reduced value of peak currents. The memory circuit includes two or more memory cell arrays each having a plurality of memory cells and a peripheral circuit for achieving selective access operation is provided for each array. At least a timing signal and its delayed timing signals are generated in response to a control signal. Both of the timing signal and the delayed timing signal are used to enable the peripheral circuits at different timing.

Pre-processing system for pre-processing an image signal succession prior to identification

Abstract: In a pre-processing system (45) for pre-processing a succession of image signals which are extracted from an object on an input surface and which are representative of a ridge pattern of the object, a center position of the ridge pattern is determined with reference to the image signal succession and is compared with a center zone of the input surface so as to decide whether or not the center position is placed at the center zone. The center position can be decided by monitoring occurrence of runs along each scanning line and by detecting a maximum one of the numbers of runs. Alternatively, the center position may be decided by monitoring ridges extended in a preselected direction with respect to the scanning lines and by detecting a maximum one of the numbers of the ridges extended in the preselected direction. The pre-processing system may detect whether the object is true or false by monitoring the image signal succession.

Instruction fpefetching device with prediction of a branch destination for each branch count instruction

Abstract: Instructions of a loop are repeatedly prefetched with a branch history table (46) made to store a predicted branch direction of "go" to branch for a branch count instruction of the loop. The loop is left without renewing the predicted branch direction when a prediction evaluating circuit (66) finds that the predicted branch direction is incorrect. Alternatively, the predicted branch direction is temporarily renewed to "no go" to branch during penultimate execution of the branch count instruction before leave of the loop and then renewed back to "go" to branch during ultimate execution of the branch count instruction on leaving the loop. It is possible in either event to again enter the loop at once. Only when there is no data for a branch count instruction, the predicted branch direction must be stored in the branch history table together with a predicted branch destination address for an instruction which stands foremost in the loop. Renewal of the branch history table is not different in this event from the renewal carried out when the prediction evaluating circuit finds incorrectness of prediction for a branch instruction which is not a branch count instruction.

Microprocessor compatible with any software represented by different types of instruction formats

Abstract: A microprocessor include a central processing unit which executes a program according to at least one control signal generated by an instruction decoder. The instruction decoder is designed such that a first type insruction adaptable for the central processing unit can be decoded. A second type instruction unadaptable for the central processing unit is applied as an address to a conversion memory in which the first type instruction corresponding to the second type instruction in their functions is preliminarily stored. The first type instruction in the conversion memory is applied to the instruction decoder instead of the second type instruction. Thus, the second type instruction can be executed by the central processing unit unadaptable for the second type instruction.

Method of manufacturing semiconductor device

Abstract: The present invention relates to a method of forming a diffused region with a shallow junction having a refractory metal silicide layer thereon. At first, the refractory metal silicide layer is selectively formed on a silicon substrate of one conductivity type. An insulating film is then formed at least on the refractory metal silicide layer, and a contact hole is opened on a part of the silicide layer. After necessary high temperature treatments have been conducted, a dopant impurity of the opposite conductivity type is introduced from the contact hole to the silicide layer. The impurity is laterally dispersed in the silicide layer and diffused into the whole portion of the silicon substrate in contact with the silicide layer, whereby the diffused region with a shallow junction can be formed.

Facet Formation in Selective Silicon Epitaxial Growth

Abstract: Facets observed adjacent to insulator films in selective silicon epitaxial growth were studied. The facet formation depended on the crystallographic orientation of the openings, and facets did not appear adjacent to the SiO2 sidewall parallel to the [100] direction. Facet formation could also be suppressed by using a polysilicon-coated sidewall. Defects in the selective epi-layers were examined using transmission electron microscopy, and facet-free and defect-free epilayers were obtained.

System for controlling a nonvolatile memory having a data portion and a corresponding indicator portion

Abstract: A nonvolatile memory (programmable) comprises a plurality of logic memories, each of which is composed of a plurality of memory segments. Each of the memory segments is constituted of a first nonvolatile memory area capable of storing data of a predetermined bit number and a second nonvolatile memory area containing an identifier for the corresponding first nonvolatile memory area. Each of the logical memories is given one logical address, and when write operation is executed, a controller operates to access to the logical memory identified by the inputted logical address so as to erase in the accessed logical memory the memory segment having the identifier indicating that the data is stored, and to write the inputted data to the memory segment next to the erased memory segment.

VM/4: ACOS-4 virtual machine architecture

Abstract: VM/4 is a virtual machine facility designed and implemented for NEC's ACOS-4 general purpose computer series. Using this facility, multiple ACOS-t~ series computer systems can be run on a single ACOS-4 computer system. For this facility, the VM/4 architecture has been newly designed, extending the ACOS-4 architecture• Its major design emphasis is to at tain high performance• First, VM/~ has an integrated virtual machine system structure. In this system, general user's jobs can be executed directly under the native operating system, in parallel with virtual machines, without incurring virtual machine overhead. Furthermore, jobs on the virtual machine can be run with minimum overhead time. This high performance derives from highly effective and efficient hardware/firmware• Overhead amounts ranging from 3 96 to 7 96, compared to elapsed time on native machine, are thereby obtained. This paper describes the VM/t~ design policy and compares it with other virtual machine systems• An outline of the VM/4 architecture is provided, along with a summary of its implementation on ACOS System t~50. Finally, the VM/4 performance measurement results and the overhead factors are described•

Novel LSI/SOI wafer fabrication using device layer transfer technique

Abstract: A device layer transfer technique, wherein a device layer already fabricated on a silicon wafer is transferred onto an insulating substrate, has been developed for achieving an LSI/SOI wafer. This technique is based on preferential polishing, newly developed with a more than 100 Si/SiO 2 polishing rate ratio. A bipolar LSI active layer, formed in a 1 µm thick epitaxial layer, has been successfully transferred to a 4 inch diameter quartz glass. No change in I C -V CE characteristics of the transistor and leakage current of CB junction were observed. Isolation breakdown voltage was markedly improved after transfer. The device transfer technique is a promising method for realizing an LSI/SOI wafer with both large diameter and high crystal quality.

Digital radio communication system utilizing quadrature modulated carrier waves

Abstract: In order to achieve the spectrum economy and reduce the power consumption of a transmitter and reduce the error rate at a receiver and simplify receiver circuitry, at least one bit stream to be transmitted is quadrature modulated in a manner that the signal points do not define a trace on a complex amplitude plane which passes through the origin of the plane coordinates or in the vicinity thereof. The received signal is hard limited and frequency-discriminated to determine the instantaneous angular velocity of the received signal and is integrated to detect the phase variation between two consecutive received signals, and thereafter is decided with respect to the phase variation according to the decision threshold levels 0 and ±π radians.

High frequency connector

Abstract: A high frequency connector for interconnecting a microstrip circuit and an external circuit. That portion of a center conductor which is adjacent to the microstrip circuit is deviated from the axis of the connector and resiliently supported, thereby eliminating an intermediary element for interconnection to promote easy and positive interconnection. The connector is desirably applicable to TEM mode waves lying in the frequency band of 0.3-30 GHz.