Institution
STATS ChipPAC Ltd
About: STATS ChipPAC Ltd is a based out in . It is known for research contribution in the topics: Integrated circuit & Integrated circuit packaging. The organization has 645 authors who have published 1222 publications receiving 25181 citations.
Topics: Integrated circuit, Integrated circuit packaging, Die (integrated circuit), Layer (electronics), Substrate (printing)
Papers published on a yearly basis
Papers
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15 Mar 2013TL;DR: In this article, a semiconductor device has an encapsulant deposited over a first surface of the semiconductor die and around the die and a conductive layer is formed over the first insulating layer.
Abstract: A semiconductor device has an encapsulant deposited over a first surface of the semiconductor die and around the semiconductor die. A first insulating layer is formed over a second surface of the semiconductor die opposite the first surface. A conductive layer is formed over the first insulating layer. An interconnect structure is formed through the encapsulant outside a footprint of the semiconductor die and electrically connected to the conductive layer. The first insulating layer includes an optically transparent or translucent material. The semiconductor die includes a sensor configured to receive an external stimulus passing through the first insulating layer. A second insulating layer is formed over the first surface of the semiconductor die. A conductive via is formed through the first insulating layer outside a footprint of the semiconductor die. A plurality of stacked semiconductor devices is electrically connected through the interconnect structure.
302 citations
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01 Dec 2008TL;DR: In this paper, a first dummy die is mounted to the carrier and a second interconnect structure is formed over the first semiconductor die and the dummy die, which is then connected to the through-silicon via (TSV).
Abstract: A semiconductor device is fabricated by providing a carrier for supporting the semiconductor device. A first semiconductor die is mounted to the carrier. The first semiconductor die has a contact pad. A first dummy die is mounted to the carrier. The first dummy die has a through-silicon via (TSV). The first semiconductor die and the first dummy die are encapsulated using a wafer molding material. A first interconnect structure is formed over the first semiconductor die and the first dummy die. The first interconnect structure is connected to the contact pad of the first semiconductor die and the TSV of the first dummy die. The carrier is removed and a second interconnect structure is formed over the first semiconductor die and the first dummy die. The second interconnect structure is connected to the TSV of the first dummy die. A semiconductor package is connected to the second interconnect structure.
300 citations
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08 Dec 2008TL;DR: In this paper, a semiconductor device includes an IPD structure, a first semiconductor die mounted to the IPD with a flipchip interconnect, and a plurality of first conductive posts that are disposed adjacent to the first die.
Abstract: A semiconductor device includes an IPD structure, a first semiconductor die mounted to the IPD structure with a flipchip interconnect, and a plurality of first conductive posts that are disposed adjacent to the first semiconductor die. The semiconductor device further includes a first molding compound that is disposed over the first conductive posts and first semiconductor die, a core structure bonded to the first conductive posts over the first semiconductor die, and a plurality of conductive TSVs disposed in the core structure. The semiconductor device further includes a plurality of second conductive posts that are disposed over the core structure, a second semiconductor die mounted over the core structure, and a second molding compound disposed over the second conductive posts and the second semiconductor die. The second semiconductor die is electrically connected to the core structure.
217 citations
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08 Oct 2003TL;DR: In this paper, a method for making a semiconductor multi-package module, by affixing an upper molded package including an upper substrate in inverted orientation onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.
Abstract: A semiconductor multi-package module has stacked lower and upper packages, each of which includes a die attached to a substrate, in which the second package is inverted, and in which the first and second substrates are interconnected by wire bonding, and in which the first package includes a flip-chip ball grid array package having a flip-chip in a die-down configuration. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a flip-chip in a die-down configuration, affixing an upper molded package including an upper substrate in inverted orientation onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.
172 citations
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26 Jun 2009TL;DR: In this article, a semiconductor device is made by forming a conductive layer over a temporary carrier, and a stud bump is formed over the wettable pad, which can be a stacked bump or stacked bumps.
Abstract: A semiconductor device is made by forming a conductive layer over a temporary carrier. The conductive layer includes a wettable pad. A stud bump is formed over the wettable pad. The stud bump can be a stud bump or stacked bumps. A semiconductor die is mounted to the carrier. An encapsulant is deposited over the semiconductor die and around the stud bump. A first interconnect structure is formed over a first surface of the encapsulant. The first interconnect structure includes a first IPD and is electrically connected to the stud bump. The carrier is removed. A second interconnect structure is formed over a second surface of encapsulant opposite the first interconnect structure. The second interconnect structure includes a second IPD. The first or second IPD includes a capacitor, resistor, or inductor. The semiconductor devices are stackable and electrically connected through the stud bump.
156 citations
Authors
Showing all 645 results
Name | H-index | Papers | Citations |
---|---|---|---|
Reza A. Pagaila | 39 | 117 | 4154 |
Seng Guan Chow | 37 | 131 | 4070 |
Yaojian Lin | 37 | 158 | 4757 |
Byung Tai Do | 33 | 155 | 3312 |
Il Kwon Shim | 31 | 106 | 3025 |
Pandi C. Marimuthu | 28 | 70 | 2096 |
Heap Hoe Kuan | 28 | 99 | 2363 |
Seung Wook Yoon | 27 | 115 | 2118 |
Zigmund Ramirez Camacho | 25 | 173 | 2191 |
Rajendra D. Pendse | 24 | 61 | 1386 |
HeeJo Chi | 22 | 54 | 1272 |
HanGil Shin | 21 | 45 | 1142 |
Jianmin Fang | 21 | 34 | 1457 |
Linda Pei Ee Chua | 21 | 79 | 1475 |
Kang Chen | 21 | 32 | 1590 |