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Proceedings ArticleDOI

A bus encoding technique for power and cross-talk minimization

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TLDR
No Adjacent Transition (NAT) coding scheme is proposed, a bus encoding technique that simultaneously reduces power consumption and eliminates cross-talk in system-level buses.
Abstract
Considerable research has been done in the area of bus-encoding techniques, for either power minimization or cross-talk elimination in system-level buses, but not both together. We propose No Adjacent Transition (NAT) coding scheme, a bus encoding technique that simultaneously reduces power consumption and eliminates cross-talk. NAT-encoding and decoding algorithms are proposed and an analytical study of power dissipation is presented.

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Journal Article

Energy-efficient Non Uniform Last Level Caches for Chip-multiprocessors Based on Compression

TL;DR: Two different architectures based on nonuniform cache architectures (NUCA) disable cache banks with low accesses and high invalid, zero, and FV lines, leading to high energy efficiency.
References
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Journal ArticleDOI

Bus-invert coding for low-power I/O

TL;DR: In this article, the bus-invert method of coding the I/O was proposed to decrease the bus activity and thus decrease the peak power dissipation by 50% and the average power disipation by up to 25%.

Bus-invert coding for low-powerI/O

M.R. Stan
TL;DR: The bus-invert method of coding the I/O is proposed which lowers the bus activity and thus decreases theI/O peak power dissipation by 50% and the I-O average power Dissipation by up to 25%.
Journal ArticleDOI

Crosstalk reduction for VLSI

TL;DR: An expression for the coupled noise integral and a bound for the peak coupled noise voltage are derived which shows order of magnitude improvements in both accuracy and fidelity compared to the charge sharing model used in previous work.
Proceedings ArticleDOI

Bus encoding to prevent crosstalk delay

TL;DR: This paper finds that a 32-bit bus can be encoded with 40 wires using a code with memory or 46 wires with a memoryless code, in comparison to the 63 wires required with simple shielding.

Asymptotic zero-transition activity encoding for address buses in low-power microprocessor-based systems

L. Benini
TL;DR: Analytical and experimental analyses are presented showing the improved performance of the encoding scheme when compared to both binary and Gray addressing schemes, the latter being widely accepted as the most efficient method for address bus encoding.