Journal ArticleDOI
Crosstalk bounded uncorrelated jitter (BUJ) for high-speed interconnects
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TLDR
A jitter model to calculate the time difference between the distortion-free and the distorted edge crossings of the victim signal was developed and the worst case timing difference, BUJ/sub p-p/, and an algorithm to generate the histogram distribution of BUJ is developed.Citations
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Patent
Input-output device testing including embedded tests
TL;DR: In this article, a set of combinatorial logic coupled to the scan registers, the update registers, and the instruction test processor is presented, where at least two I/O of the plurality of I/Os but less than all of the majority of I /Os couple to an external tester.
Proceedings ArticleDOI
An Accurate Jitter Estimation Technique for Efficient High Speed I/O Testing
Dongwoo Hong,Kwang-Ting Cheng +1 more
TL;DR: This paper describes a technique for estimating total jitter that, along with a loopback-based margining test, can be applied to test high speed serial interfaces and shows that only a very small number of measurement points is needed for accurate estimation.
Universitµa degli Studi di Napoli \Federico II"
D. Bini,G. Esposito +1 more
TL;DR: In this paper, ateneo dovrà provvedere al conferimento degli incarichi d'insegnamento annuali indicati nell’allegato “A” which costituisce parte integrante del presente Bandoper.
Journal ArticleDOI
Measurement and Analysis of Interconnect Crosstalk Due to Single Events in a 90 nm CMOS Technology
A. Balasubramanian,O.A. Amusan,Bharat L. Bhuva,Robert A. Reed,Andrew L. Sternberg,Lloyd W. Massengill,Dale McMorrow,S.A. Nation,Joseph S. Melinger +8 more
TL;DR: In this paper, the presence of single event induced interconnect crosstalk has been measured and demonstrated experimentally using single and two photon laser absorption techniques in the IBM 90 nm CMOS9SF process.
Journal ArticleDOI
Crosstalk Effects Caused by Single Event Hits in Deep Sub-Micron CMOS Technologies
TL;DR: Simulation results obtained substantiate that the effects of Single Event (SE) crosstalk increase as devices scale down, as the amount of charge deposited to cause an upset increases, and as the interconnect length increases.
References
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Book
Random variables and stochastic processes
TL;DR: An electromagnetic pulse counter having successively operable, contact-operating armatures that are movable to a rest position, an intermediate position and an active position between the main pole and the secondary pole of a magnetic circuit.
Book
High-Speed Digital System Design: A Handbook of Interconnect Theory and Design Practices
TL;DR: This book provides a much-needed, practical guide to the state of the art of modern digital system design, combining easily accessible explanations with immensely useful problem-solving strategies.
Book
Signal Integrity - Simplified
TL;DR: The Signal Integrity-Simplified as discussed by the authors is a complete guide to understand and design for signal integrity, which offers a comprehensive, easy-to-follow look at how physical interconnects affect electrical performance.
Journal ArticleDOI
The Effects of Interconnections on High-Speed Logic Circuits
TL;DR: It is shown that high-speed circuitry must be miniaturized and the implications are discussed.