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Journal ArticleDOI

The Effects of Interconnections on High-Speed Logic Circuits

D. B. Jarvis
- 01 Oct 1963 - 
- Vol. 12, Iss: 5, pp 476-487
TLDR
It is shown that high-speed circuitry must be miniaturized and the implications are discussed.
Abstract
By way of worked examples in typical but somewhat idealized cases the effect on circuit speed of circuit interconnections is studied. The source, calculation and minimization of interconnection crosstalk is also discussed. It is shown that high-speed circuitry must be miniaturized and the implications are discussed.

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Citations
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Proceedings ArticleDOI

Analysis of Multiconductor Transmission Lines

TL;DR: In this paper, the authors outline a methodology for the computation of the response of a multiconductor transmission line terminated by linear networks, where the lines are embedded in a multilayered lossy dielectric media and have arbitrary cross sections, but uniform along the length.
Journal ArticleDOI

Effects of inductance on the propagation delay and repeater insertion in VLSI circuits

TL;DR: The importance of inductance in high-performance very large scale integration (VLSI) design methodologies will increase as technologies scale, as the error between the RC and RLC models increases as the gate parasitic impedances decrease with technology scaling.
Book

Time-Domain Response of Multiconductor Transmission Lines

TL;DR: In this paper, several techniques for the computation of the line response, starting from the known circuit-theory parameters, are presented and evaluated, such as time-stepping solution of the telegrapher equations, modal analysis in the time domain, model analysis in frequency domain, and a convolution technique which uses line Green's functions.
Journal ArticleDOI

Figures of merit to characterize the importance of on-chip inductance

TL;DR: In this article, a closed-form solution for the output signal of a CMOS inverter driving an RLC transmission line is presented, based on the alpha power law for deep submicrometer technologies.
Journal ArticleDOI

Equivalent Elmore delay for RLC trees

TL;DR: Closed-form solutions for the 50% delay, rise time, overshoots, and settling time of signals in an RLC tree are presented and have significantly improved accuracy as compared to the Elmore delay for an overdamped response.
References
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Journal ArticleDOI

Directional Electromagnetic Couplers

TL;DR: In this article, a simple configuration of four wires (or two wires and ground) can serve simultaneously as a directional coupler, filter, and transformer, and the coupled lines may be of equal or different impedance.
Proceedings ArticleDOI

The engineering design of the stretch computer

TL;DR: This computer, like the 704, is aimed at scientific problems such as reactor design, hydrodynamics problems, partial differential equations etc., its instruction set and organization are such that it can handle with ease data-processing problems normally associated with commercial applications, such as processing of alphanumeric fields, sorting, and decimal arithmetic.
Proceedings ArticleDOI

The Atlas supervisor

TL;DR: This paper gives a brief description of work originating in the Computer Group at Manchester University, the name given to a large computing system which can include a variety of peripheral equipments, and an extensive store.
Book

The Atlas supervisor

TL;DR: In this article, a brief description of work originating in the Computer Group at Manchester University is given, where the core store is divided into 512 word "pages"; this is also the size of the fixed blocks on drums and magnetic tapes.
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