Journal ArticleDOI
Design of Silicon IP Cores for Biorthogonal Wavelet Transforms
Shahid Masud,John V. McCanny +1 more
- Vol. 29, Iss: 3, pp 179-196
TLDR
A methodology for rapid silicon design of biorthogonal wavelet transform systems has been developed based on generic, scalable architectures for the forward and inverse wavelet filters, suitable for FPGA and PLD implementations.Abstract:
A methodology for rapid silicon design of biorthogonal wavelet transform systems has been developed. This is based on generic, scalable architectures for the forward and inverse wavelet filters. These architectures offer efficient hardware utilisation by combining the linear phase property of biorthogonal filters with decimation and interpolation. The resulting designs have been parameterised in terms of types of wavelet and wordlengths for data and coefficients. Control circuitry is embedded within these cores that allows them to be cascaded for any desired level of decomposition without any interface logic. The time to produce silicon designs for a biorthogonal wavelet system is only the time required to run synthesis and layout tools with no further design effort required. The resulting silicon cores produced are comparable in area and performance to hand-crafted designs. These designs are also portable across a range of foundries and are suitable for FPGA and PLD implementations.read more
Citations
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TL;DR: A novel methodology for VLSI implementation of computation-intensive algorithms targeting digital signal processing applications, which combines IP reuse and high-level synthesis (HLS) and introduces the notion of "Behavioral IP".
References
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Journal ArticleDOI
Orthonormal bases of compactly supported wavelets
TL;DR: This work construct orthonormal bases of compactly supported wavelets, with arbitrarily high regularity, by reviewing the concept of multiresolution analysis as well as several algorithms in vision decomposition and reconstruction.
Journal ArticleDOI
Wavelets and signal processing
Olivier Rioul,Martin Vetterli +1 more
TL;DR: A simple, nonrigorous, synthetic view of wavelet theory is presented for both review and tutorial purposes, which includes nonstationary signal analysis, scale versus frequency,Wavelet analysis and synthesis, scalograms, wavelet frames and orthonormal bases, the discrete-time case, and applications of wavelets in signal processing.
Journal ArticleDOI
Biorthogonal bases of compactly supported wavelets
TL;DR: In this paper, it was shown that under fairly general conditions, exact reconstruction schemes with synthesis filters different from the analysis filters give rise to two dual Riesz bases of compactly supported wavelets.
Journal ArticleDOI
VLSI architectures for discrete wavelet transforms
Keshab K. Parhi,T. Nishitani +1 more
TL;DR: The use of a combined folded and digit-serial architecture is proposed for implementation of two-dimensional discrete wavelet transforms and its drawbacks are increased hardware area, less than 100% hardware utilization, and the complex routing and interconnection required by the converters used.
Journal ArticleDOI
Wavelets for a vision
TL;DR: This tutorial describes major applications to multiresolution search, multiscale edge detection, and texture discrimination.
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