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Patent

Dielectric storage memory cell having high permittivity top dielectric and method therefor

Frank K. Baker
TLDR
In this paper, the authors proposed a nonvolatile memory (NVM) cell, which uses a storage dielectric as the storage element, has a top dielectrically between a gate and the storage, and a bottom-dielectric between a semiconductor substrate and the NVM.
Abstract: 
A non-volatile memory (NVM) cell, which uses a storage dielectric as the storage element, has a top dielectric between a gate and the storage dielectric and a bottom dielectric between a semiconductor substrate and the storage dielectric. The top dielectric includes a relatively thick and high k dielectric layer and an interfacial layer. The interfacial layer is very thin and has a higher k than silicon oxide. The bottom dielectric layer is preferably silicon oxide because of its interfacial and tunneling properties. The cell thus has benefits resulting from a well-passivated, high k top dielectric in combination with a bottom dielectric of silicon oxide.

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Citations
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Patent

Hafnium aluminium oxynitride high-K dielectric and metal gates

Leonard Forbes, +2 more
TL;DR: The tantalum aluminum oxynitride film may be formed using atomic layer deposition and metal electrodes may be disposed on a dielectric containing a tantalum aluminium oxynithride film as mentioned in this paper.
Patent

Hafnium tantalum oxynitride high-k dielectric and metal gates

Leonard Forbes, +2 more
TL;DR: In this paper, the hafnium tantalum oxynitride film may be formed using atomic layer deposition, and metal electrodes may be disposed on a dielectric containing a HAFLO-OXNITride film.
Patent

Methods for fabricating hafnium tantalum oxide dielectrics

Kie Y. Ahn, +1 more
TL;DR: A dielectric layer containing a hafnium tantalum oxide film arranged as a structure of one or more monolayers was proposed in this article, and a method of fabricating such a dielectrous layer was described.
Patent

Tantalum lanthanide oxynitride films

Leonard Forbes, +2 more
TL;DR: In this paper, the tantalum lanthanide oxynitride film was used to construct a dielectric containing a tantalum-laneide oxide (LDO) film.
Patent

Flash memory having a high-permittivity tunnel dielectric

Leonard Forbes
TL;DR: In this article, a high permittivity tunneling dielectric is used in a flash memory cell to provide greater tunneling current into the floating gate with smaller gate voltages.
References
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Patent

Low temperature gate stack

Suvi Haukka, +4 more
TL;DR: In this paper, a method for forming dielectric layers on a substrate, such as in an integrated circuit, is described. But the method is not suitable for high-k deposition at less than or equal to about 300°C.
Patent

Preparation of composite high-K / standard-K dielectrics for semiconductor devices

Arvind Halliyal, +3 more
TL;DR: In this paper, a semiconductor device having a composite dielectric layer, including a substrate, alternating sub-layers including a high-K and a low-K dielectrics on the semiconductor substrate, is considered.
Patent

Programmable array logic or memory devices with asymmetrical tunnel barriers

Leonard Forbes, +2 more
TL;DR: In this paper, an asymmetrical low tunnel barrier intergate insulator is proposed for programmable array type logic and/or memory devices with nonvolatile memory which has a first source/drain region and a second source/drain region separated by a channel region in a substrate.
Patent

Floating trap non-volatile semiconductor memory devices including high dielectric constant blocking insulating layers

Chang-Hyun Lee, +2 more
TL;DR: In this article, a floating trap nonvolatile memory (FLVM) was proposed, where the memory devices include a semiconductor substrate and an adjacent gate electrode, and a charge storage layer between the substrate and the gate electrode may be a tunneling insulating layer having a first dielectric constant.
Patent

Memory device that includes passivated nanoclusters and method for manufacture

Ramachandran Muralidhar, +7 more
TL;DR: In this article, a semiconductor memory device with a floating gate that includes a plurality of nanoclusters and techniques useful in the manufacturing of such a device are presented, where the nanocusters are encapsulated using various techniques prior to formation of the control dielectric layer.