scispace - formally typeset
Patent

Flash-Memory System with Enhanced Smart-Storage Switch and Packed Meta-Data Cache for Mitigating Write Amplification by Delaying and Merging Writes until a Host Read

Reads0
Chats0
TLDR
In this paper, repeated data patterns are detected and encoded by compressed meta-data codes that are stored in meta-pattern entries in a metapattern cache of a meta pattern flash block.
Abstract
A flash memory solid-state-drive (SSD) has a smart storage switch that reduces write acceleration that occurs when more data is written to flash memory than is received from the host. Page mapping rather than block mapping reduces write acceleration. Host commands are loaded into a Logical-Block-Address (LBA) range FIFO. Entries are sub-divided and portions invalidated when a new command overlaps an older command in the FIFO. Host data is aligned to page boundaries with pre- and post-fetched data filling in to the boundaries. Repeated data patterns are detected and encoded by compressed meta-data codes that are stored in meta-pattern entries in a meta-pattern cache of a meta-pattern flash block. The sector data is not written to flash. The meta-pattern entries are located using a meta-data mapping table. Storing host CRC's for comparison to incoming host data can detect identical data writes that can be skipped, avoiding a write to flash.

read more

Citations
More filters
Patent

Apparatus, system, and method for managing eviction of data

TL;DR: In this paper, an apparatus, system, and method for managing eviction of data is described. But the storage operations are associated with storage operations between a host and a backing storage device.
Patent

Systems and methods for a de-duplication cache

TL;DR: In this paper, a de-duplication cache is configured to cache data for access by a plurality of different storage clients, such as virtual machines, and metadata pertaining to the contents of the cache may be persisted and/or transferred with respective storage clients.
Patent

Apparatus, system, and method for caching data on a solid-state storage device

TL;DR: In this paper, an apparatus, system, and method are disclosed for an caching data using a solid-state storage device, where metadata indicates what data in the cache is valid, as well as information about what data from the nonvolatile cache has been stored in the backing store.
Patent

Apparatus, system, and method for destaging cached data

TL;DR: In this paper, an apparatus, system, and method are disclosed for destaging cached data in a nonvolatile solid-state storage device (NVS) with a cache controller.
Patent

Apparatus, system, and method for auto-commit memory

TL;DR: An auto-commit memory as discussed by the authors is capable of implementing a preconfigured, triggered commit action in response to a failure condition, such as a loss of power, invalid shutdown, fault, or the like.
References
More filters
Patent

Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices

TL;DR: In this article, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed, where sectors are organized into blocks with each sector identified by a host provided logical block address (LBA).
Patent

Flash memory system and method implementing LBA to PBA correlation within flash memory array

TL;DR: In this article, a flash memory system is designed to reduce inefficiencies associated with keeping track of logical block address to physical block address (PBA) correlation or mappmg.
Patent

Flash memory management

TL;DR: In this paper, flash memory is managed utilizing memory management data structures residing in volatile memory of a flash memory device, which are created and updated each time power is supplied to the memory device.
Patent

USB smart switch with packet re-ordering for interleaving among multiple flash-memory endpoints aggregated as a single virtual USB endpoint

TL;DR: In this paper, a dual-mode Universal Serial-Bus (USB) switch can operate in a normal hub mode to buffer transactions from a host to multiple USB flash storage blocks that are USB endpoints.
Patent

Flash memory card with block memory address arrangement

TL;DR: In this article, a flash disk card using a flash memory is provided with MPU for converting the cylinder, head and sector numbers, which are input from a host device, into a logical block address and a sector address in block format, determining a physical block address (PBA) having the same size as that of an erase block, with reference to a logical/physical block address conversion table stored in the flash memory.