Patent
Flash-Memory System with Enhanced Smart-Storage Switch and Packed Meta-Data Cache for Mitigating Write Amplification by Delaying and Merging Writes until a Host Read
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TLDR
In this paper, repeated data patterns are detected and encoded by compressed meta-data codes that are stored in meta-pattern entries in a metapattern cache of a meta pattern flash block.Abstract:
A flash memory solid-state-drive (SSD) has a smart storage switch that reduces write acceleration that occurs when more data is written to flash memory than is received from the host. Page mapping rather than block mapping reduces write acceleration. Host commands are loaded into a Logical-Block-Address (LBA) range FIFO. Entries are sub-divided and portions invalidated when a new command overlaps an older command in the FIFO. Host data is aligned to page boundaries with pre- and post-fetched data filling in to the boundaries. Repeated data patterns are detected and encoded by compressed meta-data codes that are stored in meta-pattern entries in a meta-pattern cache of a meta-pattern flash block. The sector data is not written to flash. The meta-pattern entries are located using a meta-data mapping table. Storing host CRC's for comparison to incoming host data can detect identical data writes that can be skipped, avoiding a write to flash.read more
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References
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Patent
Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
Petro Estakhri,Berhanu Iman +1 more
TL;DR: In this article, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed, where sectors are organized into blocks with each sector identified by a host provided logical block address (LBA).
Patent
Flash memory system and method implementing LBA to PBA correlation within flash memory array
TL;DR: In this article, a flash memory system is designed to reduce inefficiencies associated with keeping track of logical block address to physical block address (PBA) correlation or mappmg.
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TL;DR: In this paper, flash memory is managed utilizing memory management data structures residing in volatile memory of a flash memory device, which are created and updated each time power is supplied to the memory device.
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TL;DR: In this article, a flash disk card using a flash memory is provided with MPU for converting the cylinder, head and sector numbers, which are input from a host device, into a logical block address and a sector address in block format, determining a physical block address (PBA) having the same size as that of an erase block, with reference to a logical/physical block address conversion table stored in the flash memory.