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Patent

Forward discrete cosine transform engine

TLDR
In this article, a fast discrete cosine transform (DCT) method was proposed to perform fast DCT by computing the DCT in five stages using three coefficients, and scaling the outputs using a plurality of scaling coefficients.
Abstract
Systems and methods are disclosed to perform fast discrete cosine transform (DCT) by computing the DCT in five stages using three coefficients, and scaling the outputs using a plurality of scaling coefficients.

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Citations
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Patent

Efficient implementation of block-based transform on graphics processing unit

TL;DR: In this article, a discrete cosine transform (DCT) and inverse DCT are implemented on a graphics processing unit (GPU) using direct matrix multiplication, such as parallel graphics pipelines, multi-channel capability, and multiple render targets.
Patent

Reduction of errors during computation of inverse discrete cosine transform

TL;DR: In this paper, the authors proposed techniques to reduce rounding errors during computation of discrete cosine transform using fixed-point calculations, where a matrix of scaled coefficients is calculated by multiplying coefficients in a matrix by scale factors.
Patent

Efficient fixed-point approximations of forward and inverse discrete cosine transforms

TL;DR: In this article, the authors describe techniques to approximate computation of an inverse discrete cosine transform using fixed-point calculations, where matrixes of scaled coefficients are generated by multiplying coefficients in matrix of encoded coefficients by scale factors.
Patent

Signalling of maximum dynamic range of inverse discrete cosine transform

TL;DR: In this article, a range indication element is used to indicate the maximum dynamic range of inverse discrete cosine transform (IDCT) output values that may be produced when a set of encoded media data is decoded.
Patent

Transform design with scaled and non-scaled interfaces

TL;DR: In this paper, the authors describe a technique for efficiently performing full and scaled transforms on data received via full-and scaled interfaces, respectively, in a 2D IDCT, which may be implemented in a separable manner with 1D DCTs.
References
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Patent

Discrete cosine transformer

TL;DR: In this article, an improved method and apparatus for calculating discrete cosine transform coefficients from a plurality of digitalized data is described, which utilizes two basic types of circuits arranged in five computational stages.
Patent

High speed cosine transform

TL;DR: In this paper, a discrete transform cosine circuit utilizing symmetries of the cosine matrix of coefficients was proposed to allow all multiplications to be done by "constant multipliers" comprising combinations of look-up tables and adders.
Patent

Jpeg/mpeg decoder-compatible optimized thresholding for image and video signal compression

TL;DR: In this article, a threshold selection for the DCT coefficients of an image or video frame is based on optimizing for minimum distortion for a specified maximum target coding bit rate or, equivalently, for minimized coding bits rate for the specified maximum allowable distortion constraint.
Patent

Image data processing method and apparatus

TL;DR: In this paper, an image data reconstructing appatatus for reconstructing an original image by dividing image data into a plurality of blocks each comprising NXN picture elements, performing two-dimensional orthogonal transform on each of said blocks, quantizing and encoding the result of said transform, decoding the encoded result, dequantizing and twodimensional inverse orthogonality transforming the above result.
Patent

VLSI circuit structure for implementing JPEG image compression standard

TL;DR: In this article, a fully pipelined VLSI image processing structure comprising a DCT module (24) for transforming input video signals to produce DCT output signals, an entropy processing module (26) for receiving the DCT outputs and processing them to produce compressed image data signals, and a timing control means (28) for providing timing control signals at predetermined timing interval to control the processing of the input.