Patent
Integrated circuit read only memory bit organized in coincident select structure
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TLDR
In this paper, an integrated circuit read only memory fabricated on a single semiconductor chip, the memory cell array being arranged with orthogonal sets of access lines providing coincident selection of unidirectional current devices, such as base-emitter diodes, at the junctions of the access lines.Abstract:
An integrated circuit read only memory fabricated on a single semiconductor chip, the memory cell array being arranged with orthogonal sets of access lines providing coincident selection of unidirectional current devices, for example, base-emitter diodes, at the junctions of the access lines. The memory cells are read by detecting the presence or absence of current flow through one or more selected cells. One set of access lines is formed by base diffusion stripes spaced apart in a common-collector isolation well. The orthogonal set of access lines is formed by metal lines overlying the base stripes and the individual emitters diffused in the base stripes at the points of intersection with the metal lines. Programming of the bit pattern is accomplished by contacts between the emitters and the metal lines at selected cross-over points. An improved inverter circuit is provided in the memory array access circuitry.read more
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References
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Semiconductor device, method, and memory array
TL;DR: In this paper, a semiconductor device which has a first electrical state prior to the application of a particular voltage to at least one conductor and a second, different irreversible electrical state after the voltage was applied to the selected conductor is described.
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