Patent
Integrated injection logic structure fabricated by outdiffusion and epitaxial deposition
TLDR
In this article, the vertical transistor is formed by auto-doping an epitaxial silicon layer for an improved transistor doping profile, which is achieved by the incorporation of Schottky diodes into the circuit.Abstract:Â
Merged transistor logic integrated circuit wherein the vertical transistor is formed by auto-doping an epitaxial silicon layer for an improved transistor doping profile. Further device improvements are achieved by the incorporation of Schottky diodes into the circuit.read more
Citations
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Patent
Use of selectively deposited tungsten for contact formation and shunting metallization
Werner Adam Metz,Nicholas J. Szluk,Gayle Wilburn Miller,Michael Joseph Drury,Paul Andrew Sullivan +4 more
TL;DR: In this article, a thin layer of intrinsic polysilicon or amorphous silicon is conformally deposited, patterned and covered by selectively deposited tungsten, an anneal operation then forms self-aligned contacts or shunts, between the tundered layer and the source/drain type diffusions exposed during the contact cut.
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Stent and catheter assembly and method for treating bifurcations
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TL;DR: An improved stent design and stent delivery catheter assembly for repairing a main vessel and a side branch vessel forming a bifurcation was presented in this paper. But the stent was not designed to fit in a single tube.
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Fabrication method for vertical PNP structure with Schottky barrier diode emitter utilizing ion implantation
TL;DR: In this article, a vertical PNP bipolar transistor structure with Schottky barrier diode emitter is described, which simplifies the structure and process steps for combining a complementary PNP in an NPN integrated circuit.
Patent
Method for fabricating vertical NPN and PNP structures and the resulting product
TL;DR: In this article, a method for fabricating vertical NPN and PNP structures on the same semiconductor body is presented, which involves providing a monocrystalline semiconductor substrate having regions of monocrystine silicon isolated from one another by isolation regions.
References
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Proceedings ArticleDOI
Schottky transistor logic
H. Berger,S. Wiedmann +1 more
TL;DR: In this article, circuit/device concepts, evolving from MTL/I2L, that improve power delay and speed limits of superintegrated logic, are discussed, and results from exploratory devices show the feasibility of the approach.
Patent
Multilayered vertical transistor having reach-through isolating contacts
Berger H,S Wiedmann +1 more
TL;DR: In this article, a logic circuit consisting of a PNP transistor and an NPN transistor is proposed to perform the INVERTER and NOR functions, and two such basic circuits are interconnected to provide the NOR function.
Patent
Integrated circuit process utilizing orientation dependent silicon etch
TL;DR: Orientation-dependent etching is employed in the fabrication of a monolithic semiconductor circuit network to provide electrical isolation and increased packing density, while minimizing collector series resistance and output capacitance.
Patent
Monolithically integrable digital basic circuit
TL;DR: In this paper, a switching transistor is employed, whose emitter terminal is connected to a voltage source and whose collector and base are linked with the base and the emitter of the switching transistor respectively.
Patent
Integrated circuit memory cell
TL;DR: In this paper, the collector region of each vertical transistor has two metal contacts, one to form a Schottky diode to couple to a bit line, and the other to form an ohmic connection for crosscoupling of the two halves.
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