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Journal ArticleDOI

Least-square estimation of the equivalent circuit parameters of a via-hole from a TDR reflectogram, including on-board rise time and delay estimation

P.A. Kok, +1 more
- 01 May 1993 - 
- Vol. 16, Iss: 3, pp 292-299
TLDR
In this paper, two different time-domain reflectometry (TDR)-based methods for estimating the equivalent circuit parameters of a via hole are presented, the first method is semigraphical, the second is a numerical estimation technique.
Abstract
Two different time-domain reflectometry (TDR)-based methods for estimating the equivalent circuit parameters of a via hole are presented. The first method is semigraphical, the second is a numerical estimation technique. Estimation is not restricted to equivalent circuit parameters, but onboard unknown rise times and delays are also included. Two possible models for a via hole are compared: a single capacitor model and a pi -network, with two capacitances and an inductance. For certain categories of via hole, the inductive component turns out to be rather important. >

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Citations
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Journal ArticleDOI

Modeling differential via holes

TL;DR: A method to characterize differential via holes in printed circuit boards in a both fast and accurate way by using FASTCAP to compute the values of the capacitances and a closed form formula to obtain the inductance values.
Journal ArticleDOI

Modelling complex via hole structures

TL;DR: A physics-based circuit model for complex via hole structures in printed circuit boards that is valid at frequencies up to a few gigahertz for typical via hole geometries, where the return current follows a well defined path.
Journal ArticleDOI

Prediction of the excess capacitance of a via-hole through a multilayered board including the effect of connecting microstrips or striplines

TL;DR: In this article, an integral equation-based quasi-static method is described for calculating the capacitance of multilayer board via's and the influence of the geometric parameters on the via capacitance is examined.
Journal ArticleDOI

Equivalent network synthesis for via holes discontinuities

TL;DR: A methodology is presented for the synthesis of the passive equivalent circuit of via holes in multilayer printed circuit boards using a numerical approach suitably validated by comparison with results computed by other independent numerical methods.
Proceedings ArticleDOI

Modelling differential via holes

TL;DR: A method for the characterisation of differential via holes as a cascade of capacitances and inductance using FASTCAP and inductances using simple analytical models is presented.
References
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Journal ArticleDOI

Quasi-static analysis of a microstrip via through a hole in a ground plane

TL;DR: In this article, the equivalent circuit of a via connecting two semi-infinitely long transmission lines through a circular hole in a ground plane is found, and the pi-type equivalent circuit consists of two excess capacitances and an excess inductance.
Journal ArticleDOI

Capacitance of a circular symmetric model of a via hole including finite ground plane thickness

TL;DR: In this article, the capacitance of a simplified model of a via hole is calculated based on an integral equation approach for the surface charge density, and it is found that the via capacitance is proportional to the square root of its height, at least for the range of realistic geometrical data considered.
Journal ArticleDOI

Identification of transfer functions with time delay and its application to cable fault location

TL;DR: In this paper, a Gaussian frequency-domain maximum likelihood estimator (MLE) was used to estimate the transfer function of linear continuous-time systems with time delay, which is an errors-in-variables model, which means that the input as well as the output of the system is disturbed with noise.
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