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Proceedings ArticleDOI

Low crosstalk simultaneous 12 ch × 25 Gb/s operation of high-density silicon photonics multichannel receiver

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TLDR
High-density silicon-photonics multichannel receiver developed and demonstrated 12ch × 25 Gb/s error-free operations at the bit-error-rate of < 1E-12 for the pseudo random binary sequence (PRBS) of 231−1 signals.
Abstract
We developed high-density silicon-photonics multichannel receiver and demonstrated 12ch × 25 Gb/s error-free operations at the bit-error-rate of < 1E-12 for the pseudo random binary sequence (PRBS) of 231−1 signals. Carefully designed high power integrity successfully led to very small crosstalk penalty of 1.2 dB under the simultaneous operation at all 12 channels.

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Journal ArticleDOI

Optically disaggregated data centers with minimal remote memory latency: Technologies, architectures, and resource allocation [Invited]

TL;DR: All the requirements and key performance indicators of a network to disaggregate IT resources are identified while summarizing the progress and importance of optical interconnects are summarized, and it is shown that the more diverse the VM requests are, the higher the net financial gain is.
Journal ArticleDOI

Ultralow-Power (1.59 mW/Gbps), 56-Gbps PAM4 Operation of Si Photonic Transmitter Integrating Segmented PIN Mach–Zehnder Modulator and 28-nm CMOS Driver

TL;DR: In this paper, a Si p-i-n-type phase shifters are directly driven with a CMOS inverter driver array to realize a low power operation, and a passive RC equalizing technique is adopted to extend the modulation bandwidth up to 20 GHz while maintaining a very compact foot print for the transmitter.
Journal ArticleDOI

Low-Crosstalk Simultaneous 16-Channel × 25 Gb/s Operation of High-Density Silicon Photonics Optical Transceiver

TL;DR: In this paper, the flip chip bonded bridge structure realized high density of about 363 GB/s/cm2, and demonstrated simultaneously on all 16 channels error-free operations with low crosstalk penalties of Tx-to-Tx 1.4 dB, Rx-toRx 1.6 dB, and Txto-Rx < 0.1 dB.
Journal ArticleDOI

High-Speed Optical Digital-to-Analog Converter Operation of Compact Two-Segment All-Silicon Mach–Zehnder Modulator

TL;DR: In this article, the authors report the design and characterization of an all-Si segmented Mach-Zehnder modulator for an optical DAC transmitter, which comprises a forward-biased positive intrinsic negative (PIN) phase shifter integrated with a passive resistance and capacitance (RC) equalizer (PIN-RC) to optimize a tradeoff between modulation efficiency and analog bandwidth.
Proceedings ArticleDOI

70 Gbaud Operation of All-Silicon Mach–Zehnder Modulator based on Forward-Biased PIN Diodes and Passive Equalizer

TL;DR: 70 Gbaud NRZ operation of all-silicon Mach–Zehnder modulator was demonstrated using forward-biased PIN diodes integrated with passive equalizers to obtain a clear optical eye opening.
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