Method and apparatus for providing analog and digitally controlled capacitances for synthesizing high-frequency signals for wireless communications

TLDR: In this paper, a phase-locked loop (PLL) frequency synthesizer with a variable capacitance that includes a discrete-variable capacitance in conjunction with a continuously variable capacitive capacitance was described.

Abstract: A method and apparatus for synthesizing high-frequency signals is disclosed that overcomes integration problem associated with prior implementations while meeting demanding phase noise and other impurity requirements. In one embodiment, a phase-locked loop (PLL) frequency synthesizer is disclosed having a voltage controlled oscillator (VCO) with a variable capacitance that includes a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance, and the continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance. In a further detail, a digital control signal is disclosed to control the overall capacitance for the discretely variable capacitance circuit, and a variable control signal is disclosed to control an overall capacitance for the continuously variable capacitance circuit. In addition, the output frequency may be varied by adjusting either the digital control word or the variable control word.