Patent
Method for isolating semiconductor devices from a wafer of semiconducting material
TLDR
In this article, a PROTECTIVE LAYER of SILICON NITRIDE is deployed on the surface of the WAFER, and a GLASS HANDLE BODY HAVING a THERMAL EXPANSION COEFFICIENT CLOSELY MATCHING that of SILION is SEALED to the SILICon NITride LAYer.Abstract:
AN ARRAY OF DEVICES IS FIRST FORMED IN A SILICON WAFER. A PROTECTIVE LAYER OF SILICON NITRIDE IS DEPOSITED ON THE SURFACE OF THE WAFER, AND A GLASS HANDLE BODY HAVING A THERMAL EXPANSION COEFFICIENT CLOSELY MATCHING THAT OF SILICON IS SEALED TO THE SILICON NITRIDE LAYER. THAT PORTION OF THE WAFER BETWEEN ADJACENT DEVICES IS ETCHED AWAY, AND A BODY OF A SOFTENED GLASS WHICH HAS A LIKE EXPANSION COEFFICIENT, BUT IS LESS REFRACTORY THAN THE GLASS HANDLE BODY, IS HOT-PRESSED INTO THE ARRAY OF ISOLATED DEVICES. THE HANDLE BODY IS THEN REMOVED BY ETCHING. D R A W I N Gread more
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Process of manufacturing a three dimensional integrated circuit from stacked SOI wafers using a temporary silicon substrate
TL;DR: In this paper, the authors proposed a method of providing a first and a second Silicon-on-Insulator (SOI) wafer, wherein each SOI wafer includes a silicon layer separated from a bulk silicon substrate by a layer of dielectric material, typically SiO2.
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Patent
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Patent
Dielectrically isolated semiconductor devices
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