Patent
Peak power reduction methods in distributed charge pump systems
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TLDR
In this paper, a distributed charge pump system uses a delay element and frequency dividers to generate out of phase pump clock signals that drive different charge pumps, to offset peak current clock edges for each charge pump and thereby reduce overall peak power.Abstract:
A distributed charge pump system uses a delay element and frequency dividers to generate out of phase pump clock signals that drive different charge pumps, to offset peak current clock edges for each charge pump and thereby reduce overall peak power. Clock signal division and phase offset may be extended to multiple levels for further smoothing of the pump clock signal transitions. A dual frequency divider may be used which receives the clock signal and its complement, and generates two divided signals that are 90° out of phase. In an illustrative embodiment the clock generator comprises a variable-frequency clock source, and a voltage regulator senses an output voltage of the charge pumps, generates a reference voltage based on a currently selected frequency of the variable-frequency clock source, and temporarily disables the charge pumps (by turning off local pump clocks) when the output voltage is greater than the reference voltage.read more
Citations
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References
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Patent
Multi-stage charge pump
TL;DR: In this paper, a charge pump having multiple charge pump stages connected in series is described, and a control circuit determines the mode of operation and the number of stages that are enabled.
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Clock generator having a delay locked loop and duty cycle correction circuit in a parallel configuration
TL;DR: In this article, a duty cycle correction circuit is coupled to the first and second inputs of the delay-locked loop and further coupled to a second adjustable delay circuit to provide a corrected delay compensating for the duty cycle error.
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Multi-phase clock generator circuit
TL;DR: In this paper, a multi-phase clock generator for receiving an external clock signal through a PLL and for generating a plurality of internal clock signals differing in phase from each other is presented.
Patent
Low noise charge pump method and apparatus
TL;DR: In this article, a charge pump method and apparatus is described having various aspects, such as a single-phase clock may be used to control as many as all active switches within the charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches.
Patent
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