Patent
Programmable logic device with ferroelectric configuration memories
TLDR
In this paper, a programmable logic device with ferroelectric configuration memories storing multiple configuration data sets is presented, which can be dynamically reconfigured by changing the selection of configuration data stored in the device's integral configuration memories.Abstract:
A programmable logic device with ferroelectric configuration memories storing multiple configuration data sets. The device has programmable logic blocks, interconnections, and I/O blocks to provide desired logic functions. Those building blocks can be dynamically reconfigured by changing the selection of configuration data stored in the device's integral configuration memories. The configuration memories are divided into groups, so that they can be loaded concurrently with multiple configuration data streams. To protect the content of configuration memories from unauthorized access, the device employs an authentication mechanism that uses security IDs stored in the configuration memories. The device has a memory controller to provide an appropriate power supply sequence for ferroelectric memory cells to ensure the reliable data retention when the device is powered up or shut down.read more
Citations
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TL;DR: In this paper, a configurable integrated circuit (IC) is described, which includes a logic circuit for receiving input data sets and configuration data sets, and a connection circuit for supplying sets of the configuration data to the logic circuit at a particular rate for at least a particular time period.
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Teruhiko Kamei,Yan Li +1 more
TL;DR: In this article, a trial programming process is performed for a first set of one or more non-volatile storage elements to test usage of the non-vatile storage system, and a programming signal is calibrated by adjusting its initial magnitude.
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Teruhiko Kamei,Yan Li +1 more
TL;DR: In this article, a trial programming process is performed for a first set of one or more non-volatile storage elements to test usage of the non-vatile storage system, and a programming signal is calibrated by adjusting its initial magnitude.
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References
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Patent
A programmable logic device which stores more than one configuration and means for switching configurations
TL;DR: In this paper, a programmable logic device includes a configuration memory expanded to store two or more complete sets of configuration data, which can be re-configured within a user's clock cycle.
Patent
Special interconnect for configurable logic array
TL;DR: In this paper, a special interconnect circuit which connects adjacent configurable logic elements (CLEs) in a configurable Logic array (CLA) without using the general interconnect structure of the CLA is presented.
Patent
Field-programmable gate array with ferroelectric thin film
TL;DR: In this paper, a field-programmable gate array (FPGA) is described, which includes a program element for connecting/disconnecting first and second basic cells to/from each other responsive to a program externally input and for storing thereon the connection or disconnection state.
Patent
Microcontroller incorporating an enhanced peripheral controller for automatic updating the configuration date of multiple peripherals by using a ferroelectric memory array
TL;DR: In this article, an enhanced peripheral controller communicating between a microcontroller and multiple peripherals that increases the speed with which configuration data sets are loaded is presented. But it does not specify how the reconfigurable peripheral controller is reprogrammed each time a new peripheral is connected to the microcontroller.
Patent
Programmable logic device with multi-port memory
TL;DR: In this article, the authors describe an integrated circuit for implementing reconfigurable logic, such as a field programmable gate array ("FPGA"), as described herein has multiple blocks of multi-ported memory.