Proceedings ArticleDOI
Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array
Faik Baskaya,B. Gestner,Christopher M. Twigg,Sung Kyu Lim,David V. Anderson,Paul Hasler +5 more
- pp 319-320
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TLDR
In this paper, a bandpass filter was used as a sample analog circuit using a large-scale field-programmable analog array (FPAA) to obtain models of the mapped circuits that can be simulated using SPICE.Abstract:
Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. This paper presents rapid prototyping results of a bandpass filter as a sample analog circuit using our floating-gate based large-scale FPAA. A major source of parasitics introduced during the circuit mapping process is interconnect switches used for routing. Our goal is to obtain models of the mapped circuits that can be simulated using SPICE in order to observe the impact of interconnect parasitics on the relevant analog metrics. Our results indicate that the mapped analog circuits obtain desired responses even with interconnect parasitics, clearly demonstrating the practicality of our FPAA.read more
Citations
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Journal ArticleDOI
Current Trends in Remote Laboratories
Luis Gomes,Seta Bogosyan +1 more
TL;DR: Some current trends and challenges of state-of-the-art technologies in the development of remote laboratories in several areas related with industrial electronics education are identified and discussed.
Proceedings ArticleDOI
Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing
TL;DR: The reconfigurable computing cluster (RCC) project is a multi-institution, multi-disciplinary project investigating the use of Platform FPGAs to build cost-effective petascale computers and a 64-node prototype cluster is described.
Proceedings ArticleDOI
Hardware and software infrastructure for a family of floating-gate based FPAAs
Scott Koziol,Craig Schlottmann,Arindam Basu,Stephen Brink,Csaba Petre,Brian Degnan,Shubha Ramakrishnan,Paul Hasler,Aurele Balavoine +8 more
TL;DR: The hardware and software infrastructure supporting the use of a family of floating-gate based FPAAs being developed at Georgia Tech is compact and portable and provides the user with a comprehensive set of tools for custom analog circuit design and implementation.
Proceedings ArticleDOI
The Case for Dynamic Execution on Dynamic Hardware
TL;DR: A dynamic dataflow execution model, called the aggregated hierarchical abstract hardware architecture (or AHAHA), for use in FPGA based applications, which uses a simplified form of handshaking to schedule computations.
Proceedings ArticleDOI
Teaching FPGA system design via a remote laboratory facility
TL;DR: Preliminary survey results and first-hand experience with the laboratory were very encouraging and suggests that further studies on student learning are warranted, and advantages, concerns, and actual costs are reported.
References
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Learning Histories in Simulation-Based Teaching: The Effects on Self-Learning and Transfer
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TL;DR: With the learning history recording and inquiry available to the users of the OT simulator, a better performance was obtained during the learning process itself, and when the use of the history mechanism was removed after 2 weeks, the better performance still remained.
Journal ArticleDOI
Placement for large-scale floating-gate field-programable analog arrays
TL;DR: The goal in this paper is to develop the first placement algorithm for large-scale floating-gate-based FPAAs with a focus on the minimization of the parasitic effects on interconnects under various device-related constraints.
Proceedings ArticleDOI
Developing large-scale field-programmable analog arrays
TL;DR: This work explores the use of floating-gate devices as the core programmable element in a large-scale FPAA with applications in signal processing emphasized and an FPAA architecture is presented that offers increased functionality and flexibility in realizing analog signal processing systems.