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Patent

Self-calibration method for a frequency synthesizer using two point FSK modulation

TLDR
In this paper, a self-calibration frequency synthesizer for implementing a self calibrration method includes a first phase lock loop consisting of a reference oscillator, a phase comparator and a first charge pump.
Abstract
The frequency synthesizer for implementing a self-calibration method includes (i) a first phase lock loop comprising: a reference oscillator, a phase comparator, a first charge pump, a first loop filter, a voltage controlled oscillator, and a multimode divider counter controlled by a modulator and connected to the phase comparator; (ii) a high frequency access comprising a digital-analogue converter connected to an input of the voltage-controlled oscillator; (iii) a second charge pump connected to the phase comparator; and (iv) a second loop filter in the high frequency access. The second charge pump forms, when switched on, a second phase lock loop with the second loop filter. To calibrate gains of the converter, a voltage comparator compares an output voltage of the converter with a voltage stored in the second loop filter, after disconnecting the second charge pump from the second phase lock loop, previously locked onto a determined output frequency.

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Citations
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Hybrid analog and digital control of oscillator frequency

TL;DR: In this paper, a hybrid analog/digital control approach for a digitally controlled oscillator augments a digital control path with an analog control path that acts to center the digital controller path control signal within its range.
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Buffer with programmable input/output phase relationship

TL;DR: In this article, a phase-locked loop circuit with a phase comparator and at least one delay element is defined, such that the delay contributed by the delay element varies in accordance with the associated delay control value.
Patent

Method for calibrating a frequency synthesiser using two-point fsk modulation

TL;DR: In this paper, a two-point FSK modulation was used to calibrate a frequency synthesiser using two-dimensional (2D) FSK modulators. But the calibration unit was not considered.
Patent

Clock generation circuit with dual phase-locked loops

TL;DR: In this paper, a clock generation circuit with a first phase-locked loop (PLL) and a second PLL that are coupled in parallel with one another and receive a same feedback signal is presented.
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Low-spurious fractional N-frequency divider and method of use

TL;DR: A fractional N-frequency divider having a reduced fractional spurious output signal, which utilizes a multi-modulus frequency divider and an accumulator to generate a calibration-timing window that is used to calibrate two oscillator circuits and a phase compensation circuit, was proposed in this article.
References
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Patent

A frequency synthesiser

TL;DR: In this paper, a frequency synthesiser comprising a phase-locked loop having a reference oscillator coupled to a first input of a comparator, a voltage controlled oscillator (VCO) for providing an output signal, which output signal is fed back by way of a divider circuit, or dividing the output fequency by a factor N to a second input of said comparator.
Patent

Delta-sigma based dual-port modulation scheme and calibration techniques for similar modulation schemes

TL;DR: In this article, a digital frequency divider in the feedback path of the loop has its division ratio controlled by a digital Δ-Σ modulator, and the calibration is performed only on the high frequency path.
Patent

Clock and data recovery circuit and method thereof

TL;DR: In this paper, a phase detecting circuit, a first charge pump, a proportional load circuit, an integration load circuit and a voltage control oscillating circuit with parallel dual path was presented.
Patent

Compensating method for a pll circuit that functions according to the two-point principle, and pll circuit provided with a compensating device

TL;DR: In this article, a PLL circuit is tuned to a first frequency by using a first digital modulation signal and subsequently converted to a second frequency using a second digital modulation signals, and a differential signal that is a function of the change in voltage of a VCO control signal generated by the modulation signals is compared with a comparison signal, characteristic of the analog modulation amplitude.
Patent

Phase-locked loop frequency synthesizer with two-point modulation

TL;DR: In this paper, a phase-locked loop (PLL) frequency synthesizer with a two-point data modulation scheme and ΣΔ modulator, fractional-N architecture is presented.