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All figures (24)
Table 12: Reduction of Power with Different SSTL
Figure 15: Power Dissipation with Different Class of SSTL
Table 1: The Latest Generation i7 Processor
Table 13: Reduction of Power with Different SSTL
Figure 14: Power Dissipation with Different Class of SSTL
Figure 1: Read Only MEMORY
Table 4: Power Dissipation with SSTL-I-DCI
Table 2: Power Dissipation with SSTL2_I
Figure 5: Power Dissipation versus Frequency on SSTL_I_DCI
Figure 3: Power Dissipation versus Frequency on SSTL2-I
Table 6: Power Dissipation with SSTL15
Table 7: Power Dissipation with SSTL2_II_DCI
Figure 8: Power Dissipation versus Frequency with SSTLII_DCI.
Figure 6: Power Dissipation versus Frequency with SSTL2_II
Table 8: Power Dissipation with Different SSTL
Table 5: Power Dissipation with SSTL2_II
Figure 7: Power Dissipation Versus Frequency using SSTL15
Figure 9: Different Types of SSTL I/O Standard
Figure 11: Power Dissipation with Different Class of SSTL
Figure 12: Power Dissipation with Different Classes of SSTL
Table 10: Reduction of Power with Different SSTL
Table 11: Reduction of Power with Different SSTL
Figure 10: Power Dissipation with Different Class of SSTL
Figure 13: Power Dissipation with Different Class of SSTL
Proceedings Article
•
DOI
•
SSTL I/O Standard based environment friendly energyl efficient ROM design on FPGA
[...]
Meenakshi Bansal
1
,
Neha Bansal
1
,
Rishita Saini
1
,
Bishwajeet Pandey
1
,
Lakshay Kalra
1
,
D. M. Akbar Hussain
2
- Show less
+2 more
•
Institutions (2)
Chitkara University
1
,
Aalborg University
2
01 Nov 2014
-