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Substrate with fine metal pattern, print circuit board and semiconductor device, and production method of substrate with fine metal pattern, print circuit board and semiconductor device

TLDR
In this paper, a manufacturing method of a substrate with fine metal patterns is proposed to prevent abnormal metal precipitation on the surface of a resin base when non-electrolyte nickel palladium gold plating processing is performed on the surfaces of fine metal pattern on a substrate such as the terminal part of a print circuit board.
Abstract
The invention provides a manufacturing method of a substrate with fine metal patterns The method enables prevention of abnormal metal precipitation on the surface of a resin base when non-electrolyte nickel palladium gold plating processing is performed on the surface of fine metal patterns on a substrate such as the terminal part of a print circuit board Meanwhile, by the method, high-quality substrate with plating processing faces having fine metal patterns, print circuit boards and semiconductor devices can be obtained The manufacturing method of the substrate with fine metal patterns comprises the steps of embedding the lower part of a fine metal pattern in a trench equipped on a supporting surface of a substrate made of resin, performing non-electrolyte nickel palladium gold plating processing on the fine metal pattern part which is not in contact with the surface of the trench and making the ratio between the height X the plating area projects on the support surface and the minimum distance Y between patterns (X/Y)less than 08

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Patent

Semiconductor device structure and method for forming the same

TL;DR: In this article, a semiconductor device structure with a first semiconductor substrate having a first surface, a second surface, and a recess is described. But the second surface is opposite to the first surface.
Patent

Electroless copper plating method for manufacturing multi layer pcb using ion palladium catalyst

TL;DR: In this article, a method to plate the penetration hole of a multilayer printed circuit board, in which multiple conductors and non-conductors are alternatively laminated, by electroless copper plating by using conductive palladium ion solution is presented.
Patent

High density interconnects in an embedded trace substrate (ETS) comprising a core layer

TL;DR: In this article, a substrate that includes a first substrate portion, a second substrate portion and a second dielectric layer is defined, where the plurality of core substrate interconnects includes a plurality of surface core substrate Interconnects formed over the first surface of core layer.
Patent

Method for plating an antenna according to double injection molding

Lee Soon Koo
TL;DR: In this paper, a double-injection molding process was used for forming an antenna on a base member through a preprocessing step, an electroless copper plating step, and a sealing step.
References
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Patent

Wiring board and its manufacture

TL;DR: In this paper, the authors proposed a manufacturing method of a wiring board where a plurality of high density wirings are arranged on both surfaces or an inner layer of the board, and various kinds of electronic components can be mounted on the surface of the wiring board with high mounting density.
Patent

Electroless gold-plating method and electronic component

TL;DR: In this paper, the authors proposed a method of efficiently depositing an electroless gold-plating film of a plating film laminate on which the electroless nickel plating, electroless palladium plating and electroless metal plating are deposited.
Patent

Wiring board and manufacturing method of the same

TL;DR: In this paper, the problem of providing a wiring board permitting normal electrical connection between an electrode and a connecting pad of an electronic component all the time, and providing a manufacturing method of the same, is addressed.
Patent

Printed circuit board, manufacturing method therefor, semiconductor chip mounting substrate, manufacturing method therefor, and semiconductor package

TL;DR: In this paper, the problem of providing a printed circuit board (mother board, semiconductor chip mounting substrate, multilayer interconnection board) and a semiconductor package having excellent insulation reliability without causing bridges, and their manufacturing methods is addressed.
Patent

Printed wiring board

TL;DR: In this article, the problem of providing a printed wiring board which has fine-wiring wirability and insulation reliability was addressed, and the authors characterized the ratio X/Y of a wiring thickness X to an insulating layer thickness Y is 0.01 to 0.5.