Journal ArticleDOI
VLSI systolic arrays for adaptive nulling [radar]
Reads0
Chats0
TLDR
A case study of the design of a computationally intensive system to do adaptive nulling of interfering signals for a phased-array radar with many antenna elements, and another DSP computation that might benefit from similar architecture, technology, or algorithms: the solution of Toeplitz linear equations.Abstract:
Presents a case study of the design of a computationally intensive system to do adaptive nulling of interfering signals for a phased-array radar with many antenna elements. The goal of the design was to increase the computational horsepower available for this problem by about three orders of magnitude under the tight constraints of size, weight and power which are typical of an orbiting satellite. By combining the CORDIC rotation algorithm, systolic array concepts, Givens transformations, and restructurable VLSI, we built a system as small as a package of cigarettes, but capable of the equivalent of almost three billion operations per second. Our work was motivated by the severe limitations of size, weight and power which apply to computation aboard a spacecraft, although the same factors impose costs which are worth reducing in other circumstances. For an array of N antennas, the cost of the adaptive nulling computation grows as N/sup 3/, so simply using more resources when N is large is not practical. The architecture developed, called MUSE (matrix update systolic experiment) determines the nulling weights for N=64 antenna elements in a sidelobe cancelling configuration. After explaining the antenna nulling system, we discuss another DSP computation that might benefit from similar architecture, technology, or algorithms: the solution of Toeplitz linear equations.read more
Citations
More filters
Journal ArticleDOI
50 Years of CORDIC: Algorithms, Architectures, and Applications
TL;DR: A brief overview of the key developments in the CORDIC algorithms and architectures along with their potential and upcoming applications is presented.
Journal ArticleDOI
MIMO Power Line Communications
TL;DR: It is shown that upgrading from a conventional single-input-single-output PLC configuration to a 2 × 2 MIMO configuration, the throughput can be more than doubled while coverage is increased, and the channel capacity adhering to the electromagnetic compatibility regulations currently in force is estimated.
Proceedings ArticleDOI
Efficient implementation of rotation operations for high performance QRD-RLS filtering
TL;DR: It is shown via computer simulations that the convergence behavior of the scheme using approximate Givens rotations is insensitive to the value of r, and that the misadjustment error decreases as r is increased, opening zip possibilities for "incremental refinement" strategies.
Proceedings ArticleDOI
Architectures for adaptive weight calculation on ASIC and FPGA
TL;DR: FPGA implementations of two parallel array architectures for adaptive weight calculation based an QR-decomposition by Givens rotations are presented, making FPGA a viable alternative to ASIC implementation in applications where power consumption and volume cost are not critical.
Proceedings ArticleDOI
A VLSI implementation of MIMO detection for future wireless communications
Z. Guo,Peter M. Nilsson +1 more
TL;DR: It is shown that the implementation complexity can be reduced further to meet the requirements for future high speed downlink packet access (HSDPA) systems with MIMO extensions in 3/sup rd/ generation (3G) mobile wireless systems.
References
More filters
Journal ArticleDOI
The CORDIC Trigonometric Computing Technique
TL;DR: The trigonometric algorithms used in this computer and the instrumentation of these algorithms are discussed in this paper.
Journal ArticleDOI
Rapid Convergence Rate in Adaptive Arrays
TL;DR: A direct method of adaptive weight computation, based on a sample covariance matrix of the noise field, has been found to provide very rapid convergence in all cases, i.e., independent of the eigenvalue distribution.
Journal ArticleDOI
A novel algorithm and architecture for adaptive digital beamforming
TL;DR: A novel algorithm and architecture are described which have specific application to high performance, digital, adaptive beamforming and have many desirable features for very large scale integration (VLSI) system design.
Journal ArticleDOI
Hyperbolic householder transformations
C. Rader,Allan Steinhardt +1 more
TL;DR: A class of transformation matrices is developed, analogous to the Householder matrices, with a nonorthogonal property designed to permit the efficient deletion of data from least-squares problems, shown to effect deletion with much less sensitivity to rounding errors than for techniques based on normal equations.
Proceedings ArticleDOI
Restructurable VLSI-a demonstrated wafer-scale technology
P.W. Wyatt,J.I. Raffel +1 more
TL;DR: Restructurable VLSI (RVLSI) as mentioned in this paper is an approach to wafer-scale integration which has been demonstrated by building six different monolithic silicon, waferscale chips for signal processing applications.