Showing papers on "Anodic bonding published in 1989"

A Model for the Silicon Wafer Bonding Process

Abstract: The bonding speed (or contact wave velocity) of silicon and fused quartz wafers has been measured as a function of temperature. The results show that the bonding process stops to operate at temperatures above 90°C and 320°C for fused quartz and bare silicon wafers, respectively. By comparing our results to infrared spectra obtained from silica gel we develop a tentative model of the bonding process. This model is based on the assumption that the initial wafer bonding process occurs via hydrogen bonds of adsorbed water. This model explains why the bonding strength increases in two distinct steps during high temperature annealing. By introducing a phenomenological time constant τ we can also account for the fact that in an intermediate temperature range the bonding strength does not depend on annealing time as it has been reported in the literature.

Silicon-on-insulator wafer bonding-wafer thinning technological evaluations

Abstract: The realization of wafer-scale Silicon-on-Insulator by Van der Waals wafer bonding and subsequent thinning of one of the wafers is described for 100 mm wafers. The bonding of two silicon wafers is brought about by Van der Waals forces which are found to be sufficiently strong for a tight bond at wafer distances of less than 1 nm. This condition requires wafer surfaces which are extremely flat and free of dust particles. Usually the bonding susceptibility is enhanced by a short polishing step. Van der Waals bonding (dipole bonding) is sufficiently strong to withstand the thinning procedure, but bonding is often enhanced by an anneal step (chemical bonding) before thinning. Four thinning procedures are described: 1. Electroless chemical thinning: Selective etching of highly doped bulk material of an active wafer using an electrochemically controlled HF–HNO3–HAc–H2O etchant down to a low-dope, low etch-rate epilayer. 2. Chemical thinning: Electrochemically controlled chemical etching of p-type bulk material of an active wafer down to a p/n junction, where electrochemical passivation of an n-type silicon epilayer occurs. 3. Thinning down to a tribochemical polish stop: In this technique an active wafer is polished until grooves filled with Si3N4 are encountered. The removal rate then becomes small while SOI remains in the areas between the grooves. 4. Polish without stopper: By adapting the existing optical polishing technology, extreme control of flatness and parallelism of wafer surfaces can be achieved. It then becomes possible to polish homogeneously down to SOI layers a few microns thick over a 100 mm wafer. In procedures 1 and 2 an acceptable surface quality is obtained by applying a final tribochemical polishing step. Experimental results of the four technologies are presented. In these technologies, tribochemical polishing is crucial. The necessity of this polishing technology as an off-line facility is discussed in the broader context of ICs of the future.

Method for bubble-free bonding of silicon wafers

Abstract: A method for bubble-free bonding of silicon wafers to silicon wafers or silicon wafers to quartz wafers either outside or inside a Clean Room. The method includes the steps of positioning wafers in closely spaced-apart and parallel relationship to each other in a rack or the like with mirror-polished surfaces of the wafers facing each other, cleansing the mirror-polished surfaces with a hydrophilization cleansing solution, flushing the cleansing solution from the mirror-polished surfaces of the wafers with deionized water, drying the wafers in a spin-dryer, and moving the wafers together so that contact occurs between opposing mirror-polished surfaces of the wafers and bonding occurs. The bonded wafers are then placed into a wafer shipping and storing container for improved wafer storage performance.

Interface Charge Control Of Directly Bonded Silicon Structures

Abstract: The influence of interface states and charges on the properties of Si/Si and Si/SiO2 interfaces prepared by wafer bonding, using the direct bonding technique, has been investigated. Surface potentials of Si/Si interfaces with all combinations of doping type (n‐n,p‐p,p‐n) are dependent on surface and heat treatments in the bonding procedure and on wafer dopant concentration. In earlier reported works, hydrophilic wafer surface properties have been reported as necessary for a good mechanical bonding. We find that wafer treatment in HF giving hydrophobic surfaces not only gives good mechanical properties, but also better electronic properties as well. For all combinations of doping type, lower magnitudes in surface potential were measured in samples prepared from wafers pretreated in HF in order to etch off the native oxide layer, normally present on silicon surfaces. If a native oxide is present when the bonded interface is prepared, the current through the interface will be influenced by an energy barrier ...

Bubble-Free Wafer Bonding of GaAs and InP on Silicon in a Microcleanroom

Abstract: A technology is presented that will allow the fabrication of thin III-V compound semiconductor layers of low dislocation density on silicon substrates. GaAs and InP wafers were successfully bonded to bare and oxidized silicon substrates in an experimental setup that produces a microcleanroom for bubble-free bonding in any environment. The bonding strength was found to be comparable to that of Si on oxidized Si and sufficient to subsequent grinding and polishing of the bonded wafers.

Coriolis-effect fluid mass flow and density sensor made by a micromachining method

Abstract: An apparatus for measuring fluid mass flow and/or density has a generally U-shaped flow channel (107) formed in a cantilevered member (103) by a micromachining technique, such as by a lithography and etching process. A top cover (102) is bonded over the member (103) to enclose the channel (107), the bonding being made by an electrostatic or anodic bonding means. By vibrating the cantilevered member during fluid flow, and sensing the resultant motion, the mass flow and fluid density can be measured. Excitation and detection may be thermal, optical, electrostatic, piezoelectric or electromagnetic.

Semiconductor integrated circuit device, method for producing or assembling same, and producing or assembling apparatus for use in the method

Abstract: The present invention is characterized in that, in a ball wedge bonding using a fine bonding wire precoated with a thin insulating layer, ultrasonic vibration is applied to a capillary to effect the delivery of the wire smoothly during movement of the capillary to a second bonding point while delivering the wire after ball bonding at a first bonding point.

Pressure sensor construction and method for its fabrication

Abstract: This invention concerns a capacitive pressure sensor construction and method for fabricating said sensor. The pressure sensor construction comprises a base part (1, 2, 4), comprising an electrically conductive silicon layer (1, 2) and a thereupon permanently bonded planar intermediate layer (4) of an insulating material with an essentially smaller thickness than that of the silicon layer (1, 2); a fixed planar capacitor electrode (9) fabricated on the base part (1, 2, 4); and a deflecting membranous capacitor electrode (6) fabricated of silicon and integral with a surrounding, essentially thicker base element (5), and gappedly spaced from and aligned at least approximately coincident with the fixed capacitor electrode (9), so that a hermetically sealed chamber (25) remains between the fixed electrode (9) and the membranous electrode (6). According to the invention, the base part (1, 2, 4) is perpendicularly divided into areas (1, 2) galvanically isolated from each other, namely to a contact area (2), which is coincident with the fixed capacitor electrode (9), galvanically connected to said electrode and designed with an area maximally equal to that of said electrode, and to at least one bonding area (1), which is isolated from the contact area (2) by an insulating layer (3) and to which a bonding voltage can be applied during the anodic bonding process in order to bond the base part to the base element (5) of the membranous capacitor electrode. The construction avoids stray capacitances at bonding area.

Method of providing optically flat surfaces on processed silicon wafers

Abstract: A method for producing optically flat thin semiconductor wafers (12) bonded to a substrate (16). The wafer (12) is bonded without touching the top surface of the wafer (12). Also, the bond is created without the use of pressure. Electrostatic bonding, or contact bonding or both may be employed. After the wafer (12) is bonded, it is then polished to a desired thickness and flatness. After contact bonding and polishing the wafer (12) may then be removed for further processing. The wafer may then be contact bonded to a final substrate (b 34) or electrostatically bonded to a final substrate (42). The contact bonding technique may also be employed as a means for holding the wafer (12) during precise photolithography. The optical flatness achieved permits improved yields over conventional means for securing wafers during photolithography. The electrostatic bonding technique permits extremely thin optically flat silicon wafers to be produced.

Coating for carbon-carbon composites and method for producing same

Abstract: A coating for sealing carbon--carbon composites against hydrogen. The coating comprises a first layer of silicon carbide and a second layer of a glass, glass-ceramic or a low-melting-point metal such as tin or an alloy thereof. Particularly when such second layer is a glass, e.g. an SiO2 -containing glass, or a glass-ceramic, preferably the silicon carbide coating is pretreated, e.g. by oxidation thereof to form a thin layer of SiO2 prior to application of the glass layer. The glass layer can be an SiO2 glass formed by sputtering or by decomposition of tetraethylorthosilicate (TEOS) applied to the oxidized silicon carbide coating. An alkali metal oxide, e.g. Na2 O, or an alkaline earth metal oxide, e.g. BaO, can be added to the SiO2 glass.

Gold Gettering in Directly Bonded Silicon Wafers

Abstract: Gold gettering in directly bonded silicon wafers was investigated. Wafers of (100) orientation were rotationally misoriented against each other by 1° or 25° and bonded by annealing at 1100°C for 2 hours in nitrogen. Transmission electron micrographs had shown two different bonding interface structures depending on the rotational angle. The bonded wafers were gold-deposited on one side and annealed for 3 hours at 950°C or 1000°C in vacuum. The spreading resistance was measured and the result showed a double-U profile in both 1°-misoriented and 25°-misoriented samples. Our results show for the first time that the bonding interface acts as a gettering site and that the bonding interface might be used to artificially introduce gettering sites close to the regions in which devices would be fabricated.

Silicon wafer bonding: chemistry, elasto-mechanics, and manufacturing

Abstract: Summary form only given. Three subjects closely associated with the silicon wafer bonding process are discussed: (i) the chemistry, (ii) the elastomechanics, and (iii) manufacturing of bubble or void-free wafer bonding in a non-cleanroom environment. The surfaces of the silicon wafers to be bonded must be hydrophilic. Silicon-direct-bonding (SDB) for power device applications or bonding via an intentionally introduced oxide initially always occurs via water adsorbed on the native or intentionally introduced oxide layers. The amount of adsorbed water has been changed by performing the contacting of the wafers at temperatures ranging from room temperature up to about 350 degrees C for different wafer combinations. The speed of the bonding contact wave decreases with increasing temperature. Bonding ceases to operate between about 100 and 320 degrees C depending on the specific wafer combination. Since silicon wafer bonding requires flat wafers, a flatness criterion for bonding is derived. The flatness requirements on commercially available prime grade wafers are stringent enough to fulfil the criterion. On the other hand, the criterion is much harder to fulfil for buried structures even if the height of localized steps are in the 10-1000 AA range. Manufacturing of void-free bonded wafers requires not only the use of sufficiently flat wafers but also the elimination of dust particles between the wafers. A method by which the wafers to be bonded are kept close together during cleaning and drying is discussed. This method permits void-free wafer bonding even outside of a cleanroom in a laboratory. >

High thermal resistance bonding material and semiconductor structures using same

Abstract: A high thermal resistance bonding material for semiconductor chips includes a binder such as epoxy or polyimide and high thermal resistance material dispersed therein such as glass micropheres, glass beads, ceramic microspheres and ceramic beads. The particles of high thermal resistance material are sieved to obtain particles of generally uniform size. In plastic-encapsulated semiconductor chips, each chip is enveloped by the bonding material.

A new LSI bonding technology 'micron bump bonding technology'

Abstract: The micron-bump bonding method for LSI chip bonding, which allows micron-order direct bonding between the LSI electrode and an electrode on the circuit substrate, is discussed. The shrinkage stress generated in light-setting insulation resin is utilized to apply a compressive force to the LSI chip, pressing it against the electrodes provided on a substrate. LSI chips having an interelectrode spacing of 10 mu m and 2320 electrodes was successfully gang bonded face down with high reliability. >

Tunneling Structures Fabricated by Silicon Wafer Direct Bonding

Abstract: Tunneling diodes with highly doped and abrupt pn-junctions, and p+nn+ diodes were fabricated by bonding 4 inch silicon wafers at room temperature. After low temperature annealing (300–800°C) the electrical properties of the bonding interface could be changed by applying high currents up to 500 A/cm2. For tunneling diodes stressed with high current densities negative resistance effects have been obtained. The p+nn+ diodes with bonded n+ and p+ emitters showed S-shaped current switching observed in p-n-I-M structures. It is shown that due to the presence of an oxide at the bonding interface the current is limited in bonded pn-junctions.

Bonding of ceramic parts

Abstract: Ceramic parts may be bonded by forming bonding layers of silicon dioxide, silicon, metal or metal oxide on the parts, placing the bonding layers adjacent one another and heating in an oxidizing ambient atmosphere to form an oxide bond therebetween. Pressure may be applied between the ceramic parts to aid in bonding. A reliable bonded ceramic structure is thereby provided.

Method of bonding metals with a radio-opaque adhesive/sealant for void detection and product made

Abstract: A method and structure for providing radio-opaque polymer compounds for use in metal bonding and sealing. A powder filler comprising a high atomic number metal or compound thereof is incorporated into a polymer compound to render it more radio-opaque than the surrounding metal structures. Voids or other discontinuities in the radio-opaque polymer compound can then be detected by x-ray inspection or other non-destructive radiographic procedure.

High-Quality SOI by Bonding of Standard SI Wafers and Thinning by Polishing Techniques Only

Abstract: A technology is described for Silicon-on-Insulator (SOI) wafer fabrication realized by Van der Waals wafer bonding followed by wafer thinning The uniqueness of this procedure is that only standard silicon wafer material and standard grinding and polishing techniques, derived from optics and silicon-wafer manufacturing, are applied Submicron precision concerning flatness and parallelism of a 10 cm diameter wafer pair is achieved The present SOI layer thickness aimed at is 5 µm but thinner layers are feasible

Bonding glass ceramics to high temperature alloys

Abstract: Scanning and transmission electron microscopy and energy dispersive X-ray analysis have been used to determine the interactions occuring at the interface during the coating of a Nimonic alloy and titanium metal by lithium silicate glass ceramics. The fast diffusion of chromium from the substrate into the glass is shown to have a major influence on the microstructure and phase composition of the resulting glass ceramic. It is observed that a layer of adhering metal oxide on Nimonic plays an important role in achieving the desired bonding between the alloy and the glass ceramic coating. Lack of such an oxide, in the case of titanium metal, leads to direct contact and reaction of silicates with the metal. This severe reaction between the glass coating and titanium gives rise to a porous structure. It is shown that adherence oxides are needed to control the reaction. Alternatively some form of barrier layer may be necessary.

Bonding method and bonding apparatus

Abstract: A bonding method and apparatus for bonding a wire material having a ball-like end on a bonding pad is disclosed. While the ball of the wire material on the bonding pad is being pressed by a bonding tip, an ultrasonic wave and a high frequency current are applied in combination to the bonding tip so as to improve strength of the bonding portion.

Bonding Strength and Microstructure of Bonding Interface of Hot Rolled Titanium Clad Steel

Abstract: Synopsis: In order to produce a titanium clad steel plate by hot rolling process, the effect of insert metal, rolling conditions and oxidation of clad surface on the bonding strength and the microstructure of bonded zone were investigated. The following results were obtained. (1) The titanium clad steel inserted with ultra-low carbon steel, exhibits satisfactory bonding strengths, ductilities and weldabilities. ( 2) The bonding strength is dominated by the thickness of Fe-Ti intermetallic compound produced at bonding interface and the degree of interdiffusion between Fe and Ti. High bonding strengths with very small scatter band can be obtained in the thickness range of Fe-Ti compound of 4.2 to 0.3 μm. (3) A lower bonding strength due to the oxidation on the surface to be bonded is not caused by the oxidized layer but mainly by the remarkable growth of intermetallic compound and, secondarily, by the formation of voids between Ti and steel.

Generalized bonding

Abstract: Summary form only given. The bonding and etchback approach to SOI (BESOI) can be used to combine several different semiconductors on a single monolithically integrated substrate and to bond high-quality transparent substrates for display devices, piezoelectric substrates for surface acoustic wave devices, etc. The bonding and etch-back technique for silicon SOI structures utilizes thermally grown SiO/sub 2/ as the insulating layer and the bonding interfaces. Typically, a bonding temperature of at least 800 degrees C is required to obtain bond strength sufficient to survive subsequent processing. Thus, bonding with a reactivity sputter deposited SiO/sub 2/ layer is suggested. The surface reactivity of the sputter SiO/sub 2/ can be made high enough to achieve bond energies at 165 degrees C sufficient to permit mechanical polishing and subsequent chemical polishing to a couple of microns in thickness. Then the structure can be processed at much higher temperature without serious stress problems. Certain materials (such as Ge) do not have good adhesion to SiO/sub 2/. In such cases, it is expected that the use of a few monolayers of an appropriate adhesion material or another insulator with the desired adhesion may still permit bonding with an isolation layer. This has been demonstrated using a thin Si layer on a Ge crystal to promote adhesion of a sputter deposited SiO/sub 2/ bonding layer. Finally, with bias sputtering, surface smoothness can be improved so substrates with surface morphologies somewhat too rough for direct bonding can still be bonded. These concepts have been demonstrated by successfully bonded and lapping Ge to Si, and Si to fused quartz. >

Field-assisted bonding of single crystal quartz

Abstract: A technique to produce strong, hermetic bonds between plates of single crystal quartz using a modified field-assisted bonding process is presented. Field-assisted bonding is a technique traditionally used to join glass to metals at temperatures well below normal glass softening temperatures. To promote reactivity between quartz within an electrical field at temperatures well below quartz transformation temperatures, thin films of silicon metal and glass were vapor deposited onto adjacent quartz plates. Thermal stresses caused by expansion mismatch between the quartz and the films were of concern. These stresses were reduced by determining the minimum film thicknesses capable of yielding sufficient reactivity for bonding. Processing studies were conducted to optimize bond integrity, and bonds were characterized by hermeticity, thermal shock, and mechanical shock. Packages produced under the most ideal conditions were able to survive greater than 1000 psi shock loads. 11 refs., 10 figs., 3 tabs.

High-accuracy inner lead bonding technique

Abstract: Miniaturizing electronic apparatus requires the interconnection of high-pin-count IC dies to finely pitched leads. However, conventional wire bonding does not meet this requirement. Tape automated bonding has been employed to achieve high-pin-count and high-density packaging. A fully automated inner lead bonder has been developed. Using this machine, bonding accuracy and bond strength have been investigated. The results obtained indicate that the bonding accuracy is good and that the bonding condition range is wide. This technique has been applied to LCD display module mass production. >

Bonding single crystal silicon components - using screen printed glass-solder film

Abstract: Monocrystalline silicon components (1, 2) are bonded by applying a film (3) of alkali-contg. glass, with a linear thermal expansion coefft. corresp. to that of the silicon, onto one of the components (1); assembling the components (1, 2); and subjecting the assembly to field-assisted bonding at an elevated temp. below the flow temp. of the glass. The novelty is that the glass film (3) consists of a partially crystallisable glass-solder applied by screen printing. ADVANTAGE - The glass film is applied in a simple manner.

Weight sensor element

Abstract: PURPOSE: To improve adhesion by arranging a pair of nonconductive plates in parallel, fixing the plates with bonding layers comprising an inorganic bonding layer and an organic bonding layer, and operating one plate as an elastic diaphragm in correspondence with a weight. CONSTITUTION: A pair of nonconductive alumina plates 11 and 12 are held at a specified interval and fixed with an inorganic bonding layer 13 and an organic bonding layer 14 in parallel. A loading point 15 is fixed at the central part of the plate 11, and the plate is operated as a diaphragm. Electrodes 16 and 17 are further provided on the plates 11 and 12 so as to face each other, and a capacitor is formed. As the bonding layer 13, glass whose main components is SiO 2 , PbO and the like is used. As the bonding layer 14, a material whose main components are bisphenol type epoxyresin and hexahydrophthalic anhydride is used. COPYRIGHT: (C)1990,JPO&Japio

Manufacture of dielectric isolation substrate

Abstract: PURPOSE:To avoid a strain caused by the difference in thermal expansion coefficients and reduce the warpage of a dielectric isolation substrate by bonding two Si substrates firmly to each other with an SiO2 film between. CONSTITUTION:Element isolating trenches with depths of 70mum are formed in an element forming n-type Si substrate 1 with KOH system unisotropic etchant. After an n type layer 6 is formed in the surface by a diffusion method, an SiO2 film 2 is formed by thermal oxidization. A polycrystalline Si film 3 is deposited on the SiO2 film 2. The deposited Si film 3 is shaved and polished. The polishing is carried out until single crystal Si of the element forming regions appears. A support substrate 5 on which an SiO2 film is formed by thermel oxidization is bonded to the substrate 1 on which a mirror surface SiO2 film 4 is formed by an anodic bonding method. The substrate 1 is polished until the bottoms of the isolating trenches are exposed in the surface to isolate elements from each other. With this constitution, the warpage of the substrate 1 can be reduced.

Optically flat surfaces on processed silicon wafers

Abstract: A method for producing optically flat thin semiconductor wafers (12) bonded to a substrate (16). The wafer (12) is bonded without touching the top surface of the wafer (12). Also, the bond is created without the use of pressure. Electrostatic bonding, or contact bonding or both may be employed. After the wafer (12) is bonded it is then polished to a desired thickness and flatness. After contact bonding and polishing the wafer (12) may then be removed for further processing. The wafer may then be contact bonded to a final substrate (34) or electrostatically bonded to a final substrate (42). The contact bonding technique may also be employed as a means for holding the wafer (12) during precise photolithography. The optical flatness achieved permits improved yields over conventional means for securing wafers during photolithography. The electrostatic bonding technique permits extremely thin optically flat silicon wafers to be produced.

Manufacture of semiconductor strain gage type pressure sensor

Abstract: PURPOSE:To prevent the pollution of a metallized layer on the end face of a supporting block by ions, by a construction wherein an electrode for bonding is prevented from coming into contact with the aforesaid metallized layer when a diaphragm is bonded to the supporting block by anodic bonding. CONSTITUTION:In a manufacturing process of a pressure sensor, first a pressure- sensitive diaphragm 7 and a diaphragm supporting block 5 are bonded and thereafter the supporting block 5 and a base 1 are bonded. In order to bond the diaphragm 7 and the supporting block 5, a (+) electrode 14 is put on the silicon diaphragm 7 and then a (-) electrode 15 is brought into contact with a pedestal part 5b through the intermediary of a space part 12 formed in the central part of a metallized layer 8, so as to implement anodic bonding. By using such a bonding method as stated above, Na educed from the supporting block 5 on the occasion of bonding is concentrated around the electrode 15 and the metallized layer 8 is not polluted by Na . After this bonding, the bottom side of the supporting block 5 is bonded and fixed on the base 1 through the intermediary of the metallized layer 8.