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Showing papers on "Barrier layer published in 1973"


Journal ArticleDOI
TL;DR: In this paper, the effect of barrier and porous anodization on the electromigration resistance of aluminum films was characterized and an initial barrier anodisation was found to be necessary in order to consistently enhance lifetime.
Abstract: The effect of barrier and porous anodizations, either singly or sequentially, on the electromigration resistance of aluminum films was characterized. Samples were tested for current densities in the 4×105−2×106‐A/cm2 range and temperatures between 150 and 280°C with the median failure time being used as a basis for comparison of lifetimes. An initial barrier anodization was found to be necessary in order to consistently enhance lifetime. The addition of a porous layer as well led to the best result—an increase in lifetime by a factor of 23 at 227°C. All lifetime increases were attributable to increased activation energy for the electromigration‐failure process. An increase of 0.14 eV was obtained for the double anodic structure. Results for structures having a barrier layer adjacent to aluminum were considered in terms of surface sealing of the aluminum and/or response to mechanical constraints of the overlayer. Direct porous anodization resulted in preferential oxidation at grain boundaries, thereby wide...

38 citations


Patent
19 Dec 1973
TL;DR: In this article, an improved method of forming interconnections on a semiconductor slice in which a barrier metal of TI:W or Ta is deposited followed by deposit of a conducting layer and then a masking layer of Ta after which the masking layers are patterned with photo-resist and plasma etched whereupon the conducting layer is sputter etched with the barrier layer then being removed to provide an interconnecting lead with sloping sides over which insulation and a second level of metallization may be applied without danger of problems at crossovers.
Abstract: An improved method of forming interconnections on a semiconductor slice in which a barrier metal of TI:W or Ta is deposited followed by deposit of a conducting layer and then a masking layer of Ta after which the masking layer is patterned with photo-resist and plasma etched whereupon the conducting layer is sputter etched with the barrier layer then being removed to provide an interconnecting lead with sloping sides over which insulation and a second level of metallization may be applied without danger of problems at crossovers.

33 citations


Patent
23 Apr 1973
TL;DR: In this article, a self-contained, pressure sensitive record system is provided which comprises a support having a coating of microscopic, pressure-rupturable microcapsules on the surface of the support.
Abstract: A self-contained, pressure-sensitive record system is provided which comprises a support having a coating of microscopic, pressure-rupturable microcapsules on the surface of the support, which microcapsules contain a substantially colorless color-reactant material. A continuous, non-permeable, water-insoluble, pressure-rupturable polymeric barrier layer is provided over the microcapsular coating and a third layer in the form of an adsorbent, electron-acceptor material is provided over the barrier layer. Under the application of localized pressure, the polymeric barrier layer and the walls of the microcapsules are ruptured thereby permitting contact between the color-reactant material and the adsorbent, electron-acceptor material which react to provide a distinctive colored mark.

22 citations


Patent
24 May 1973
TL;DR: In this article, a method of providing foam plastic surfaces with a relief structure comprising the steps of: producing printed films which contain at predetermined locations, substantially corresponding to the printing pattern, either (a) means which inhibit and/or accelerate foaming, or (b) barrier layer material which prevents the throughpassage of the means which inhibits or accelerates foaming.
Abstract: A method of providing foam plastic surfaces with a relief structure comprising the steps of: producing printed films which contain at predetermined locations, substantially corresponding to the printing pattern, either (a) means which inhibit and/or accelerate foaming, or (b) a barrier layer material which prevents the throughpassage of the means which inhibits or accelerates foaming, applying the film, prior to foaming, to the base layer to be foamed, and this combined or composite material is heated to the foaming temperature, whereby by means of the migration of the means inhibiting and/or accelerating foaming in accordance with the printing pattern of the film into the base layer during foaming there is obtained the relief formation of the surface and the anchoring of the printed film at the surface. There is also provided means for providing foam plastic surfaces with a relief structural design, which is characterized by the features that said means comprises an imprinted non-foamable self-supporting film or an imprinted film located at a carrier material, and wherein predetermined locations of the film corresponding to the printing design contain either, (a) means which inhibit and/or accelerate foaming, or (b) a barrier layer material which prevents the passage of the means inhibiting and/or accelerating foaming.

12 citations


Patent
C Wen1, Y Chiang1
02 May 1973
TL;DR: In this article, a method of making a SEMICONDUCTOR DEVICE COMPRISING the STEPS of: (a) forming on a surface of a SUBRATE OF SINGLE CRYSTALLINE SILICON, SAID region being of a CONDUCTIVITY type or TYPES REQUIRED by the SEMICODE BEING FORMED, and (b) removing SAID SUBSTRATE by ETCHING with a solUTION of POTASSIUM HYDROXide and 1-PROPANOL.
Abstract: 1. A METHOD OF MAKING A SEMICONDUCTOR DEVICE COMPRISING THE STEPS OF: (A) FORMING ON A SURFACE OF A SUBRATE OF SINGLE CRYSTALLINE SILICON A THIN BARRIER LAYER OF SINGLE CRYSTALLINE P TYPE CONDUCTIVITY SILICON WITH THE FREE CARRIER CONCENTRATION BEING GREATER THAN 5 X 10**19 CM.-3, (B) FORMING ON SAID BARRIER LAYER A REGION OF SINGLE CRYSTALLINE SILICON, SAID REGION BEING OF A CONDUCTIVITY TYPE OR TYPES REQUIRED BY THE SEMICONDUCTOR DEVICE BEING FORMED, AND (C) REMOVING SAID SUBSTRATE BY ETCHING WITH A SOLUTION OF POTASSIUM HYDROXIDE AND 1-PROPANOL.

12 citations


Patent
06 Dec 1973
TL;DR: In this article, a monolithic acoustic surface wave amplifier was provided by heating a piezoelectric substrate in vacuum and then depositing a thin barrier layer of silicon oxide on the substrate.
Abstract: A monolithic acoustic surface wave amplifier device is provided by heating a piezoelectric substrate in vacuum and then depositing a thin barrier layer of silicon oxide on the piezoelectric substrate. A thin film of a III-V semiconductor is deposited on the thin barrier layer, the semiconductor film overcoated with a thin film of silicon oxide and the device completed by annealing in argon.

9 citations


Patent
04 Jun 1973
TL;DR: A lyophobic barrier layer consisting of a salt of an acetate of polyvinyl alcohol or of a hydroxyl-containing copolymer and an aldehyde sulfonic acid is arranged between the layer support and the antihalation layer of a photographic material, which contains plasticisers.
Abstract: A lyophobic barrier layer consisting of a salt of an acetate of polyvinyl alcohol or of a hydroxyl-containing copolymer and an aldehyde sulfonic acid is arranged between the layer support and the antihalation layer of a photographic material, the layer support of which contains plasticisers

7 citations


Patent
Lieng Huang Lee1
17 Aug 1973
TL;DR: A xerographic member is composed of a conductive substrate having thereon an interfacial barrier layer in a thickness of about 0.5 to 3.0 microns as discussed by the authors.
Abstract: A xerographic member which comprises a conductive substrate having thereon an interfacial barrier layer in a thickness of about 0.5 to 3.0 microns. The barrier layer comprises a polymer blend or mixture of a polysulfone and an elastomeric polymer which contains polar groups. A photoconductive layer about 10 to 200 microns in thickness overlays the interfacial layer.

4 citations


Patent
30 Jul 1973
TL;DR: In this article, a continuously controllable transistor in which the ratio of the current of charged particles of one conductivity type, from the base to the collector, is approximately equal to the drift velocities collector-base barrier layer is presented.
Abstract: A continuously controllable transistor in which the ratio of the current of charged particles of one conductivity type, from the base of the collector, to the current of charged particles of the other conductivity type, from the collector to the base, is approximately equal to the ratio of the drift velocities collector-base barrier layer. This transistor exhibits high current density.

4 citations


Patent
Wolfgang Dr Ing Welsch1
13 Sep 1973
TL;DR: In this paper, a light-sensitive target for a vidicon picture tube having a single Schottky diode forming the entire light sensitive target, in contrast to a multitude of individual diodes, is described.
Abstract: A light-sensitive target for a vidicon picture tube having a single Schottky diode forming the entire light-sensitive target, in contrast to a multitude of individual diodes. One form of the invention includes a vidicon picture tube in which a thin metal layer is applied as the metal electrode on the light incident side of a very thin semiconductor layer which has a thickness of only a few microns. This semiconductor layer is arranged to be scanned by an electron beam which always strikes the target normal to the plane of the surface. The metal layer and associated thin semiconductor layer are carried by a transparent carrier which acts as a support for the metal layer and the semiconductor layer, the metal layer being adjacent the transparent carrier. The transparent carrier is on the side exposed to light. The semiconductor layer preferably is made of a weakly p-doped III-V or II-VI compound with a band distance of 1.0 to 3.0 eV. The barrier layer has a high resistance for sufficient insulation corresponding to a low dark current density smaller than 10 8 A/cm2 due to sufficient band bending.

4 citations


Patent
03 Oct 1973
TL;DR: In this paper, a thermally insulated roof covering is placed over a concrete roof substrate, which comprises two laminated heat destructible airgap forming layers 4, 8 spaced by a thermal insulation layer 6 and covered by a laminated cladding sheet 12.
Abstract: 1332441 Laminates SVENSKA ICOPALFABRIKEN AB 21 Jan 1972 [22 Jan 1971] 3090/72 Heading B5N [Also in Division E1] A thermally insulated roof covering may be placed over a concrete roof substrate 1 and' comprises two laminated heat destructible airgap forming layers 4, 8 spaced by a thermal insulation layer 6 and covered by a laminated cladding sheet 12. The heat destructible airgap forming layers comprise foamed or solid, combustible plastics or thermoplastics granules 4, 8 secured to a heat activated adhesive of glass fibre reinforced bitumen or asphalt 3, 7 on which may be adhered an aluminium steel or copper foil vapour barrier 2. On the vapour barrier layer may be formed a paper protected self-adhesive layer or a layer 3 of bitumen or asphalt over which is placed a layer 5 of combustible plastics or thermoplastics which may be polystyrene or polyethylene. To each of which layers respectively is adhered: the insulating layer 6; and the cladding layer comprising a self-adhesive layer 11, a glass wool layer 12 and a surface layer 13 of metal foil, plastics film or light coloured graded aggregate. Adhesive selvedge strips may be provided along the edges of the sheets of the various layers.

Patent
15 Jan 1973
TL;DR: In this paper, a radiation responsive device is disclosed having a barrier generating material, such as a dye or metal, interposed between two semiconductive elements, at least one of which is radiation penetrable.
Abstract: A radiation responsive device is disclosed having a barrier generating material, such as a dye or metal, interposed between two semiconductive elements, at least one of which is radiation penetrable. Metal layers are associated with the outer faces of the semiconductive elements so that the device can be biased by an externally applied potential. Radiation absorbed adjacent the barrier generating material produces a current gain in the forwardly biased device. The device can be fabricated by successively vacuum depositing upon a semiconductive element surface a layer of a barrier generating material, a semiconductive overlayer and a metal layer. The metal layer can be chosen to form a rectifying junction with the semiconductive overlayer. The barrier generating material is chosen to exhibit a surface photovoltage when applied to the surface of one of the semiconductive elements.

Patent
14 May 1973
TL;DR: A plated wire memory as discussed by the authors includes a barrier layer disposed between a core of non-magnetic conductive material and an outer layer of highly permeable magnetic material, such as permalloy.
Abstract: A plated wire memory according to the present disclosure includes a barrier layer disposed between a core of non-magnetic conductive material and an outer layer of highly permeable magnetic material, such as permalloy. The barrier layer is constructed of a conductive material which will not diffuse into the outer magnetic layer, an example of such material being gold or gold-copper alloy.

Journal ArticleDOI
TL;DR: The highest known dielectric constant of the order of 100,000 has been achi... as discussed by the authors, which is the state-of-the-art in the field of capacitance.
Abstract: Efforts made towards miniaturization in the field of Ceramic Capacitors have resulted in Barrier Layer Ceramic Capacitors. The highest known dielectric constant of the order of 100000 has been achi...