Showing papers on "Boolean circuit published in 1975"
TL;DR: An algorithm for deriving a reduced Boolean sum-o-p expression from a description of the structure using a reverse Polish notation is described, equally applicable to fault tree analysis but care must be exercised in interpreting the Boolean result as a probability relationship.
Abstract: The paper is concerned with the analysis of fault trees and describes an algorithm for deriving a reduced Boolean sum-of-product (s-o-p) expression from a description of the structure. The algorithm was developed initially as an analytic procedure for combinational logic networks and employs a reverse Polish notation to describe the structure which is then converted to an equivalent s-o-p expression. This procedure is equally applicable to fault tree analysis but care must be exercised in interpreting the Boolean result as a probability relationship. This aspect is discussed and a simple test and modification procedure described, enabling the original Boolean s-o-p expression to be converted into an equivalent s-o-p expression which can be interpreted directly as a probability relationship.
104 citations
TL;DR: A probabilistic treatment of general combinational networks has been developed and algorithms to calculate the probability of the output of a logic circuit being 1 and simplifications to the algorithm result when sets of input probabilities are given the same value.
Abstract: A probabilistic treatment of general combinational networks has been developed. Using the notions of the probability of a signal and signal independence, algorithms have been presented to calculate the probability of the output of a logic circuit being 1. Simplifications to the algorithm result when sets of input probabilities are given the same value, and this process called bundling is described in the paper. Finally, a series of examples illustrate the application of the probabilistic approach to the analysis of faulty logic circuits.
94 citations
TL;DR: The result of applying the Rademacher-Walsh transform domain classification to Boolean functions of up to fourth order indicates that threshold functions play an important part in the composition of Boolean functions.
Abstract: Five operations are defined in the Rademacher-Walsh transform domain. It is shown that these operations allow Boolean functions to be classified in a very concise way. The result of applying this classification to Boolean functions of up to fourth order indicates that threshold functions play an important part in the composition of Boolean functions. A synthesis method is developed for the synthesis of any Boolean function using, as a basic element, an "optimized universal threshold logic gate." This gate overcomes the analog threshold tolerancing problems encountered in other threshold gate designs and is readily fabricated in an integrated circuit form. The use of this gate in logic design is expected to provide a considerable cost-saving over conventional methods.
90 citations
Proceedings Article•
01 Jan 1975
TL;DR: A new method for proving linear lower bounds of size $2n$ is presented and a trade-off result between circuit complexity and formula size is derived.
Abstract: Consider the combinational complexity $L(f)$ of Boolean functions over the basis $\Omega = \{ f|f:\{ 0,1\} ^2 \to \{ 0,1\} \} $. A new method for proving linear lower bounds of size $2n$ is presented. Combining it with methods presented in Savage [13, (1974)] and Schnorr [18, (1974)], we establish for a special sequence of functions $f_n :\{ 0,1\} ^{n + 2\log (n) + 1} \to \{ 0,1\} :2.5n \leqq L(f) \leqq 6n$. Also a trade-off result between circuit complexity and formula size is derived.
43 citations
TL;DR: This paper extends the Boolean difference concept to cover multiple fault situations and develops expressions which give all possible input patterns that can be applied to combinational logic circuits to demonstrate the presence or absence of a specified multiple fault of the stuck-type class.
Abstract: The Boolean difference is a well-known mathematical concept which has found significant application in the single fault analysis of combinational logic circuits. One of the primary attributes of the Boolean difference in such situations is its completeness. In this paper we extend the Boolean difference concept to cover multiple fault situations. Expressions are developed which give all possible input patterns that can be applied to combinational logic circuits to demonstrate the presence or absence of a specified multiple fault of the stuck-type class. Such expressions are useful in situations where at most, say, p simultaneous faults need be considered, as well as situations where any multiple fault can exist. In addition the expressions developed are also shown to complete some existing single fault analysis concepts.
42 citations
TL;DR: It is shown that it is possible to realize a circuit for this problem using only O(n^{\log _2 7} \log ^2 n) gates, whence it is infer a much larger complexity gap between and- or and and and-or-not circuits than was previously known.
Abstract: We show that $n^3 $ distinct and-gate inputs appear in any circuit constructed from and-gates and or-gates that computes the product of two $n \times n$ Boolean matrices. Using not-gates as well, it is possible to realize a circuit for this problem using only $O(n^{\log _2 7} \log ^2 n)$ gates, whence we infer a much larger complexity gap between and-or and and-or-not circuits than was previously known.
34 citations
TL;DR: In this paper, it is shown that every recursively enumerable Boolean algebra is isomorphic to the Boolean algebra of sentences of some finitely axiomatizable theory. But this is not a complete characterization of all Boolean algebras of first order logic with equality and a single binary predicate.
Abstract: A general method of constructing finitely axiomatizable theories is sketched. It is shown that every recursively enumerable Boolean algebra is isomorphic to the Boolean algebra of sentences of some finitely axiomatizable theory. More complete details of the proof will appear in a forthcoming monograph by William Hanf, Dale Myers, and Roger Simons. This verifies Conjecture I of Hanf [2] that every axiomatizable theory is recursively isomorphic to a finitely axiomatizable theory. It solves a problem of [2] by showing that there exists a finitely axiomatizable undecidable theory with countably many complete extensions and shows that Conjecture II is false. Another consequence is that there exists a finitely axiomatizable theory whose Boolean algebra of sentences has an ordered basis of type 0 where 0 is any constructive ordinal. A complete characterization of 53<2>» ̂ e Boolean algebra of sentences of first order logic with equality and a single binary predicate, is obtained. These last two results answer problems considered by Tarski in the late 1930's and proposed to the author around 1960.
30 citations
TL;DR: This paper investigates the combinational complexity of Boolean functions satisfying a certain property, P nk,m, and finds that for each k, there are P n k,2k functions with complexity linear in n.
23 citations
TL;DR: The procedure proves that all multiple input change combinational circuits cannot be implemented without dynamic logic hazards with no internal feedback, and is considerably different than the single input change and multiple input changes static logic hazard cases.
Abstract: This paper deals with hazards on outputs of combinational circuits without feedback for multiple input changes. A procedure is given to decompose a Boolean function into a feedback free circuit. The procedure either gives a logic hazard-free circuit or shows that the Boolean function cannot be broken down into a feedback free circuit which is free of logic hazards for multiple input changes. The procedure proves that all multiple input change combinational circuits cannot be implemented without dynamic logic hazards with no internal feedback. The result is therefore considerably different than the single input change and multiple input change static logic hazard cases.
23 citations
TL;DR: Proof is given of the equivalence of Boolean and weighted search methods, this proof being based on the ability to convert any Boolean search request to weighted form and, similarly, any weighted request to Boolean form.
Abstract: Consideration is given to the nature of the retrieval process with emphasis on the selection algorithm employed, and its relation to document set and query form.
Proof is given of the equivalence of Boolean and weighted search methods, this proof being based on the ability to convert any Boolean search request to weighted form and, similarly, any weighted request to Boolean form.
TL;DR: An easyto-implement algorithm which gives nearly optimal results is proposed for the case of monotonic functions without a priori probabilities for Boolean functions whose variables appear in secondary storage.
Abstract: For Boolean functions whose variables appear in secondary storage, algorithms which minimize the expected cost of evaluation are considered. An easyto-implement algorithm which gives nearly optimal results is proposed for the case of monotonic functions without a priori probabilities. Optimality proofs are given for a simple special cases.
TL;DR: It is shown that real transforms allow the formulation of switching problems in the real domain, where the techniques of mathematical programming for obtaining optimal solutions can be applied.
TL;DR: Equational logic is an approach to combinational synthesis based on the equation f(x) = 1 rather than on the function f( x), which may be realized as the output of a k-wide digital comparator whose inputs are the 2k g's and h's constituting the system.
Abstract: Equational logic is an approach to combinational synthesis based on the equation f(x) = 1 rather than on the function f(x). The central problem of equational logic is to find a system of equations g i (x) = h i (x) (i = 1,2,...,k), of the simplest possible form, that has the same solutions as f(x) = 1. Given such a k-equation system, f(x) may be realized as the output of a k-wide digital comparator whose inputs are the 2k g's and h's constituting the system.
TL;DR: An efficient algorithm is presented for computing the reliability matrix of a logic network whose components are characterized by a known probability of malfunctioning, using the concept of path sensitizing to derive a graphical representation of error propagation.
Abstract: An efficient algorithm is presented for computing the reliability matrix of a logic network whose components are characterized by a known probability of malfunctioning. Using the concept of path sensitizing, a graphical representation of error propagation is derived. Through the computation of Boolean path functions, the information provided by these graphs is put into a malfunction table from which the matrix entries are directly computed. The method not only offers computational efficiency but also provides further physical insight into the reliability problem.
TL;DR: Exact upper bounds for the complexity of absolute tests checking the correctness of inputs of logic diagrams realizing Boolean functions which are essentially dependent on n variables have been found for n ≥ 136.
Abstract: Exact upper bounds for the complexity of absolute tests checking the correctness of inputs of logic diagrams realizing Boolean functions which are essentially dependent on n variables have been found for n ≥ 136.
TL;DR: Application of the method of Boolean differences in the analysis of logic expressions obtained from the network connections is discussed, and it is shown that the influence of the status of specific components on the reliability of the total system may be investigated by straightforward algebraic operations on the network failure function.
Abstract: For an electrical, mechanical, or hybrid system described diagramatically as a network of interconnected components, fault tree modeling of system reliability as a function of individual component failure probabilities gives rise to logic expressions obtained from the network connections. Application of the method of Boolean differences in the analysis of such Boolean expressions is discussed, and it is shown that the influence of the status of specific components on the reliability of the total system may be investigated by straightforward algebraic operations on the network failure function.
TL;DR: In this paper, a statistical analysis of basic logic modules is presented to illustrate the reliability evaluation of digital circuits, and examples are solved to illustrate how to evaluate the reliability of a digital circuit.
Abstract: In a logic circuit, ‘ 1 ’ and ‘ 0 ’ are only Boolean symbols and actually represent two voltages A and B. In general, A and B are random variables and hence the input(s) as well as output(s) in a digital circuit are all random. In this note a statistical analysis of basic logic modules is presented. Examples are solved to illustrate the reliability evaluation of digital circuits.
01 Sep 1975
TL;DR: An approach to the treatment of solvability and unsolvability notions for mass problems defined on finite sets and a formal scale of solver notions for such mass problems will be proposed.
Abstract: We shall describe an approach to the treatment of solvability and unsolvability notions for mass problems defined on finite sets. A formal scale of solvability notions for such mass problems will be proposed. The general approach follows some concepts of J. yon Neumann [fl], A.N.Kolmogorov [2], A.A.Markov [3], S.V. Jablonskir [4], O.B.Lupanov [5]; it is similar to the concepts of A.I~eyer [6] and A.Ehrenfeucht [7] and continues the concepts described in I~8] and [9] ( in square brackets we shall write the numbers of references and in parentheses the numbers of levels of solvability).
01 Jan 1975
TL;DR: In this paper, the authors explore the concept of local transformations of monotone switching circuits, i.e. what kind of local changes in a network leave the input/output behavior invariant.
Abstract: We explore the concept of local transformations of monotone switching circuits, i.e. what kind of local changes in a network leave the input/output behavior invariant. We obtain several general theorems in this direction. We apply these results to boolean matrix product and prove that the school-method for matrix multiplication yields the unique monotone circuit.ZusammenfassungWir untersuchen den Effekt lokaler Änderungen auf das Eingabe/Ausgabe-Verhalten monotoner Netzwerke. Wir wenden die Ergebnisse auf die Multiplikation Boolescher Matrizen an und zeigen, daß die Schulmethode für die Matrizenmultiplikation den alleinigen optimalen Schaltkreis liefert.
TL;DR: An algorithmic procedure is presented which produces an optimal two-level multiple-output network and it is shown that the function f(y, x) can be composed in such a way that the following statement can be proven as true.
Abstract: An algorithmic procedure is presented which produces an optimal two-level multiple-output network. In agreement with procedures suggested by other authors, the set of given (incompletely specified) Boolean functions of variables xi is transformed into a single (mosaic) function f( y,x) by using additional variables yi, related to the structure of the resulting network. The agreement ends here, however. It is shown that the function f(y, x) can be composed in such a way that the following statement can be proven as true.
TL;DR: This new model for set theory is a graph and it is hoped that it will be seen, not as a more computational device but as helpful for demonstrating Boolean theory, and the second half of the article is devoted to practical applications.
Abstract: This new model for set theory is a graph. It is similar in many ways to a Venn diagram or Karnaugh map, but it does not pose as a rival, merely as an alternative model which may be useful in some contexts. Defined with reference to the duality of lines and points, the graph is a fitting framework in which to display the rich duality of Boolean algebra. In the first four sections the graph is developed as a natural embodiment of Boolean theory and it is hoped that it will be seen, not as a more computational device but as helpful for demonstrating Boolean theory. The second half of the article is devoted to practical applications. The graph can be applied (and has been applied in school teaching) extensively in set theory, in logic, in probability, in genetics and in switching circuits, but space does not allow the elaboration of all these in detail. So this article concentrates mainly on one of these applications, switching circuits. The graph is used to simplify and minimize logic circuits with technique...
TL;DR: The Cranfield method of minimizing Boolean functions is examined, and it is shown that the method does not always produce all the minimal sums.
Abstract: The Cranfield method of minimizing Boolean functions is examined, and it is shown that the method does not always produce all the minimal sums. An algorithm is given which produces all the minimal sums and uses the Cranfield method as a first stage in the minimization procedure.