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Showing papers on "Cascade amplifier published in 1988"


Patent
Robert E. Myer1
05 Dec 1988
TL;DR: In this paper, an automatic gain control circuit for an amplifier operating over a prescribed frequency range detects the output level of the amplifier; and couples a repeated predetermined waveform occurring at a rate greater than the reciprocal of twice the upper frequency of the prescribed frequency to the output signal.
Abstract: An automatic gain control circuit for an amplifier operating over a prescribed frequency range detects the output level of the amplifier; and couples a repeated predetermined waveform occurring at a rate greater than the reciprocal of twice the upper frequency of the prescribed frequency range to the output level signal. The waveform varying level signal is compared to a reference threshold to control the gain of the amplifier through a switched resistive elemement in the amplifier feedback path. The repeated waveform variations about the amplifier output level causes the value of the switched resistance to vary as a function of the output level. A low pass filter connected to the amplifier output removes switching transients resulting from the high frequency changes in the switched resistive element. The gains of a plurality of amplifiers may be determined by a common control for accurate tracking over a wide dynamic range.

97 citations


Patent
09 Mar 1988
TL;DR: In this article, an automatic gain control (AGCVC) amplifier is proposed to provide linear gain response in dB over a wide dynamic range, where a control voltage is input to a linearization circuit which provides an output to an operational amplifier that functions as a voltage controlled voltage source.
Abstract: An automatic gain control (AGC) amplifier, which may be fabricated as a monolithic integrated circuit, provides linear gain response in dB over a wide dynamic range. The AGC amplifier comprises multiple cascode amplifier stages connected in cascade to provide high power handlign capability and high gain. A control voltage is input to a linearization circuit which provides an output to an operational amplifier that functions as a voltage controlled voltage source (VCVS). The VCVS produces a conditioned control voltage which is fed back to the linearization circuit and provided to each of the cascode amplifier stages. The conditioned control voltage provided to each amplifier stage causes current to be removed from the cascode amplifier, thereby lowering its gain. The overall gain of the AGC amplifier is linear in dB with respect to linear changes in the control voltage applied to the linearization circuit.

43 citations


Patent
Alfi Moscovici1
10 Aug 1988
TL;DR: A track-and-hold amplifier system comprises an added switching means (23) for adding compensatory signals to a second input of an operational amplifier (10) used in the system as mentioned in this paper.
Abstract: A track-and-hold amplifier system comprises an added switching means (23) for adding compensatory signals to a second input of an operational amplifier (10) used in the system.

42 citations


Patent
29 Dec 1988
TL;DR: In this paper, a high power amplifier combiner is used to improve the linearity of the output of an amplifier by using feedforward cancelling techniques, and at least two prelinearizers are used to suppress all distortion products.
Abstract: A high power amplifier combiner for improving the linearity of an output of an amplifier. At least two prelinearizers are used to suppress all distortion products by using feedforward cancelling techniques. The effects of compression associated with the operation of the high power amplifier are reduced.

32 citations


Patent
28 Oct 1988
TL;DR: In this article, a low-power crystal-controlled CMOS oscillator with a long and wide additional transistor is provided in the first stage of the output amplifier to prevent it from diverting too much current from the primary amplifier stage during start-up.
Abstract: A low-power crystal-controlled CMOS oscillator wherein a long and wide additional transistor is provided in the first stage of the output amplifier. This prevents the output amplifier from diverting too much current from the primary amplifier stage during start-up.

27 citations


Journal ArticleDOI
TL;DR: In this paper, the phase detection between the input optical pulses and the output clock is accomplished by modulating the gain of the optical amplifier by the clock frequency, and the experimental operation of a phase-locked loop is demonstrated with a travelling-wave type laser-diode optical amplifier for the first time.
Abstract: Experimental operation of a phase-locked loop is demonstrated with a travelling-wave type laser-diode optical amplifier for the first time. The phase detection between the input optical pulses and the output clock is accomplished by modulating the gain of the optical amplifier by the clock frequency.

26 citations


Patent
29 Dec 1988
TL;DR: In this paper, a monitor signal injection system for a feed forward cancellation amplifier having at least one stage in which monitor signals having a constant relatively large amplitude are injected into, for example, a main amplifier.
Abstract: A monitor signal injection system for a feedforward cancellation amplifier having at least one stage in which monitor signals having a constant relatively large amplitude are injected into, for example, a main amplifier. The monitor signals are used to measure the status of all individual components of the amplifier and are useful for fault detection and isolation. In addition, the monitor signals are cancelled in the output to a very low level and as a result, on-line monitoring can be performed without significant radiation of power from a load antenna.

25 citations


Patent
28 Sep 1988
TL;DR: In this article, an active bandpass amplifier consisting of a single stage operational amplifier, a bridged "T" network single frequency elimination filter in the negative feedback path of the amplifier and a phase shift correcting capacitor associated with the bridged T-NBSE filter is used to maintain an appropriate feedback such that the amplifier is stable.
Abstract: The present application relates to an active bandpass amplifier comprising a single stage operational amplifier, a bridged "T" network single frequency elimination filter in the negative feedback path of the amplifier and a phase shift correcting capacitor associated with the bridged "T" network single frequency elimination filter to effect a phase shift sufficient to maintain an appropriate feedback such that the amplifier is stable The bridged "T" network single frequency elimination filter in conjunction with the circuit capacities and phase shifts in the integrated circuits introduces a phase shift which would result in the amplifier oscillating when the network is placed in the feedback path and the corrective capacitor effects a corrective phase shift to render the amplifier stable Such a bandpass amplifier allows high gain and high "Q" and the gain is many times higher than that of a conventional single stage amplifier where gain is typically limited to approximately 5 and the "Q" is limited to about 25 In the present case, this bandpass amplifier is capable of gains of greater than 10 and substantially higher "Q" Such an amplifier is advantageously used in a receiver and in a signalling system The high gain capablility of the receiver is particularly advantageous in a mining environment where the receiver can be used as part of a signalling system

20 citations


Patent
27 Jul 1988
TL;DR: In this paper, the authors propose a cascade network for compensating the non-linearity of an amplifier, which consists of a first branch for transferring the input signal linearly and with the amplification factor 1 from a branch point to an adder.
Abstract: A network for compensating the non-linearity of an amplifier has an auxiliary network provided either before or behind said amplifier. This network comprises a first branch for transferring the input signal linearly and with the amplification factor 1 from a branch point to an adder; a second branch comprising at least one cascade network which is composed of the cascade circuit of a circuit component having a transfer function corresponding to the quadratic transfer function of the compensated amplifier and of a circuit component having a transfer function corresponding to the inverse linear component of the transfer function of the compensated amplifier; and/or a third branch comprising a cascade network composed of the cascade circuit of a circuit component having a transfer function corresponding to the cubic component of the frequency dependent transfer function of the compensated amplifier and of a circuit component having a transfer function corresponding to the inverse linear component of the frequency-dependent transfer function of the compensated amplifier.

19 citations


Patent
16 Feb 1988
TL;DR: In this article, a pyroelectric sensor circuit arrangement for reducing noise and increasing sensitivity has a main current amplifier with a high feedback resistor connected to receive input from an electrode of a Pyroelectric element, and includes a compensation amplifier in a unity gain amplifier configuration connected to a common power source with the main amplifier.
Abstract: A pyroelectric sensor circuit arrangement for reducing noise and increasing sensitivity has a main current amplifier with a high feedback resistor connected to receive input from an electrode of a pyroelectric element, and includes a compensation amplifier in a unity gain amplifier configuration connected to a common power source with the main amplifier. The compensation amplifier is connected to discharge transients from the pyroelectric element when electrode voltage exceeds the positive voltage or goes below the negative voltage of the power source. A pair of anti-parallel diode or similar component is connected between the main amplifier input and the compensation amplifier output.

18 citations


Patent
15 Aug 1988
TL;DR: In this article, a read-out amplifier for a photovoltaic detector employs an integrating amplifier (203) with capacitor feedback (230) during a self-calibrating active load (205, 240) to minimize debiasing of the detector during its operation.
Abstract: A read-out amplifier (200) for a photovoltaic detector (201) employs an integrating amplifier (203) with capacitor feedback (230) during a self-calibrating active load (205, 240) to minimize debiasing of the photovoltaic detector during its operation. The self-calibrating active load reduces the effect of noise and threshold nonuniformities of the semiconductor devices (202, 203, 204, 205) used in the read-out amplifier circuitry.

Patent
28 Oct 1988
TL;DR: In this paper, an amplifier has an amplifier input and an output with an amplifier output impedance, and the gain of the amplifier is a function of the first transconductance times the second transconductances times the amplifier input impedance times the intermediate output impedance.
Abstract: This invention is for a transconductance amplifier. The amplifier has an amplifier input and an amplifier output with an amplifier output impedance. An input stage of the amplifier has a first transconductance. An intermediate state is coupled to the amplifier output through positive feedback. The intermediate stage has a second transconductance and an intermediate stage output having an intermediate output impedance. The gain of the amplifier is a function of the first transconductance times the second transconductance times the amplifier output impedance times the intermediate output impedance.

Proceedings ArticleDOI
24 May 1988
TL;DR: In this paper, the baseline monolithic chip design consists of a single stage 400- mu m FET amplifier and a six-way traveling-wave power divider/combiner with a single-stage amplifier in each of the six arms.
Abstract: Monolithic GaAs FET power amplifiers consisting of several power-combined devices are fabricated and evaluated. The baseline monolithic chip design consists of a single stage 400- mu m FET amplifier and a six-way traveling-wave power divider/combiner with a single-stage amplifier in each of the six arms. Several chip combinations were used to make a 1-W amplifier with 5-dB gain and a 0.55-W amplifier with 27-dB gain at 34 GHz. A two-way hybrid combining scheme making use of 0.6-W monolithic chips producing 1 W of output power is also described. >

Patent
27 Dec 1988
TL;DR: In this paper, an integrating transimpedance amplifier (10) consisting of a differential amplifier constructed of GaAs, MESFET, HEMT, SDHT or MODFET transistors has an input coupled to the output of a radiation detector and an output expressive of the detector signal integrated over a predetermined interval of time.
Abstract: An integrating transimpedance amplifier (10) comprises a differential amplifier constructed of GaAs, MESFET, HEMT, SDHT or MODFET transistors has an input coupled to the output of a radiation detector (12) and an output expressive of the detector signal integrated over a predetermined interval of time. The amplifier has a transistor (Q0) coupled to the input for coupling the input periodically to a predetermined voltage potential and a transistor (Q9) coupled to the output of the amplifier for simultaneously periodically coupling the output to a predetermined voltage reference, thereby initializing the amplifier at the beginning of an integration period. A buffer transistor (Q4) couples the output of the amplifier to a GaAs MISFET switch (Q8) which is periodically activated to couple the buffered amplifier output to a storage capacitor (Csmp). The buffer transistor also couples the output of the amplifier to a feedback capacitor (Cf) which is connected between the output of the buffer amplifier and the input of the amplifier for minimizing an effect associated with the radiation detector parasitic capacitance. The magnitude of the buffered amplifier output is stored on the capacitor at the beginning and end of the integration period. The sample signal is read out by a multiplexer twice during the integration period, the difference between the initial and final value of the buffer amplifier output being indicative of the radiation impinging on the detector minus one or more noise components.

Patent
Tobita Youichi1
25 Oct 1988
TL;DR: In this article, a dynamic random access memory with first and second sense amplifiers driving signal lines is considered, and the coupling capacitance between them is provided to transmit the shift in potential which appears on one sense amplifier driving signal line to the other sense amplifier.
Abstract: In a dynamic random access memory having first and second sense amplifier driving signal lines, there are provided a coupling capacitance (41) between the first and second sense amplifier driving signal lines (14, 17) in order to transmit the shift in potential which appears on one of the sense amplifier driving signal lines to the other sense amplifier driving signal line.

Patent
01 Feb 1988
Abstract: A single-ended sense amplifier for use in integrated-circuit logic arrays. The sense amplifier circuit uses five field-effect transistors in a unique configuration that uses positive feedback to increase the output speed of response while at the same time allowing layout in the narrow pitch of one bitline of an integrated-circuit logic array.

Patent
08 Mar 1988
TL;DR: In this paper, a high gain bandpass amplifier for low frequency, low level signals from ceramic infrared sensors is proposed, which includes an input capacitor having a pair of terminals with one of the terminals for receiving the infrared sensor output signal.
Abstract: A high gain bandpass amplifier for amplifying low frequency, low level signals ouptut from ceramic infrared sensors. The amplifier includes an input capacitor having a pair of terminals with one of the terminals for receiving the infrared sensor output signal. A first MOS operational amplifier having inverting and noninverting inputs and an output, has its inverting input connected to the other terminal of the input capacitor. A first feedback network is coupled between the first amplifier inverting input and output. A resistor having a pair of terminals has one terminal connected to the first amplifier output. A second MOS operational amplifier also having inverting and noninverting inputs and an output has its inverting input connected to the other terminal of the resistor. The noninverting inputs of the first and second amplifiers are connected together and receive the reference voltage. A second feedback network is coupled between the second amplifier inverting input and output. An output capacitor having a pair of terminals has one terminal connected to the output of the second amplifier. The amplified sensor output signal is coupled out of the amplifier at the other terminal of the output capacitor.

Patent
27 May 1988
TL;DR: A public address amplifier as mentioned in this paper is a housing which contains an output amplifier connected to loudspeakers, and a microphone containing a microphone transducer and an input amplifier is connected to the input of the output amplifier and connectors on the housing by a cable.
Abstract: A public address amplifier comprises a housing which contains an output amplifier connected to loudspeakers. A microphone containing a microphone transducer and an input amplifier is connected to the input of the output amplifier and to connectors on the housing by a cable. A second such public address amplifier can be connected to the first by connecting its cable to one of the connectors so as to provide a public address system of increased power.

Patent
Kazuo Imanishi1
05 Jul 1988
TL;DR: A power amplifier circuit comprises amplifier means (11) for amplifying an input signal and supplying the amplified input signal to a load (19), and mode switching means (12, 13, 20) for selectively changing the amplifier means between an operational state wherein the input signal is amplified, and a stand-by state whereby the imput signal is not amplified.
Abstract: A power amplifier circuit comprises amplifier means (11) for amplifying an input signal and supplying the amplified input signal to a load (19), and mode switching means (12, 13, 20) for selectively changing the amplifier means between an operational state wherein the input signal is amplified, and a stand-by state wherein the imput signal is not amplifiedbeing The mode switching means includes timing means (20) for delaying the change of the amplifier means to the stand-by state for a predetermined time after the stand-­by state is selected, and means (12) for supplying a predetermined potential to the amplifier means when the stand-by state is selected

Proceedings ArticleDOI
M.A. Smith1
24 May 1988
TL;DR: In this paper, a GaAs monolithic dual-gain amplifier stage for 0.5 to 4 GHz logarithmic amplifier applications was developed and tested, and a cascade of six of these stages resulted in a true GaAs amplifier with a 70dB dynamic range, operational across this band.
Abstract: A GaAs monolithic dual-gain amplifier stage for 0.5 to 4 GHz logarithmic amplifier applications was developed and tested. A cascade of six of these stages resulted in a true logarithmic amplifier with a 70-dB dynamic range, operational across this band. A stage gain of 10 dB was chosen for each of two 'arms' in the dual-gain circuit, but because of -6-dB resistive combiner was used, the gains of both amplifier arms were increased 6 dB. The first arm has 12.7-dB gain and a saturated output power of -8 dBm, and the second arm has 6-dB gain and a saturated output power of +11 dBm. A thin-film network external to the monolithic circuit contains the -6-dB resistive combiner in which the outputs of the two amplifier arms are combined to provide the linear gain of 10 dB at low power levels. The stage gain asymptotically approaches 0 dB as input power is increased. Additional circuit elements printed on the thin-film network are two shorted stubs for gain shaping and one series transmission line to equalize the insertion phase between the two paths. >

Patent
08 Jul 1988
TL;DR: In this article, a read amplifier consisting of a load component (L), a differential amplifier component (DIFF), a compensation transistor (N6), a switching transistor (P1) connected between a supply voltage (V DD ) and the load component(L) is presented.
Abstract: A read amplifier formed of a load component (L), a differential amplifier component (DIFF), a compensation transistor (N6), a switching transistor (P1) connected between a supply voltage (V DD ) and the load component (L). The pre-loading potential of the read amplifier at its outputs LA, LA is about 2.5 volts. During the pre-loading phase, the two supply voltages (V DD , V 22 =ground) are disconnected and the pre-loading potential is established by compensation of capacitances at the outputs LA, LA which results in an improved read amplifier.

Patent
Blanken Pieter Gerrit1
27 Oct 1988
TL;DR: In this article, a transimpedance amplifier with a low-ohmic current input with an input impedance whose modulus is smaller than the modulus of the negative feedback impedance is used to enlarge the bandwidth of the amplifier.
Abstract: In an amplifier arrangement, including a transadmittance circuit having an input coupled to an input of the amplifier arrangement, and a transimpedance amplifier having an input coupled to an output of the transadmittance circuit and an output coupled to an output of the amplifier arrangement, in which the transfer function modulus of the transimpedance amplifier has a first-order decrease above a first frequency F1 and a second-order decrease above a second frequency F2, which transimpedance amplifier is negatively fed back by means of a negative current feedback circuit, the negative current feed back circuit is constituted by a negative feedback impedance whose inverse of the transfer function modulus below the second frequency F2 is smaller than the transfer function modulus of the transimpedance amplifier and which transfer function modulus has a first-order increase above a third frequency F3 so that the transfer function modulus of the negatively fed back transimpedance amplifier has a first-order decrease above a fourth frequency F4 which is substantially equal to the third frequency F3, and a second-order decrease above the fifth frequency F5 which is located above the second frequency F2, the transfer function modulus of the transadmittance circuit has a first-order increase above a sixth frequency F6 which is substantially equal to the fourth frequency F4, so that the transfer function modulus of the amplifier arrangement has a first-order decrease above the fifth frequency F5, and the transimpedance amplifier has a low-ohmic current input with an input impedance whose modulus, at least for frequencies below the fifth frequency F5, is smaller than the modulus of the negative feedback impedance, so that the bandwidth of the amplifier arrangement is enlarged.

Patent
31 Oct 1988
TL;DR: In this paper, a switch-mode amplifier consists of a series circuit of several similar coarse switchedmode amplifier stages (21-2N), a pulse-duration-modulated fine switched-mode amplification stage (2F), and a switchedmode shift stage, all of which can be selected independently of one another.
Abstract: The switched-mode amplifier consists of a series circuit of several similar coarse switched-mode amplifier stages (21-2N), a pulse-duration-modulated fine switched-mode amplifier stage (2F) and a switched-mode amplifier shift stage (2S), all of which can be selected independently of one another. A control system prevents the coarse stages from being switched over too frequently in the case of lacking or little change in input signal by selectively switching over the shift stage and ensures rapid compensation in the case of coarse-stage failures.

Patent
22 Jun 1988
TL;DR: In this article, an auto-zeroing operational amplifier for a voltage or current-to-frequency converter includes a master amplifier and a slave amplifier, and the master amplifier uses the voltage across a master capacitor to control the polarization level of an MOS transistor.
Abstract: An autozeroing operational amplifier for a voltage or current-to-frequency converter includes a master amplifier and a slave amplifier. The master amplifier uses the voltage across a master capacitor to control the polarization level of an MOS transistor. Changing this level changes the operation of a differen­tial pair connected to a load thereby changing the am­plifier's input offset voltage. The slave amplifier, similarly constructed, is connected to periodically refresh the voltage across the master capacitor to com­pensate for drift and temperature effects.

Journal ArticleDOI
TL;DR: In this paper, a dc strain-gauge bridge amplifier configuration with automatic compensation of thermal drift using common operational amplifiers is presented, where the amplifier operation is divided into two steps: one of autozeroing and other of amplification of the input signal.
Abstract: A dc strain‐gauge bridge amplifier configuration with automatic compensation of thermal drift using common operational amplifiers is presented. The amplifier operation is divided into two steps: one of auto‐zeroing and other of amplification of the input signal. The zeroing of the input signal is achieved by switching the bridge excitation to zero periodically at a frequency of about 100 Hz, thus limiting the maximum frequency of the input signal to about 8 Hz. With a gain of 5000, the output voltage drift of the amplifier is measured to be about 1 mV for a temperature change of 40 °C.

Journal ArticleDOI
B.J. Minnis1
TL;DR: In this article, the authors describe a novel variation of the distributed amplifier circuit which enables the upper operating frequency to be increased well beyond the limit set previously by the gate capacitance in a conventional circuit design.
Abstract: The letter describes a novel variation of the distributed amplifier circuit which enables the upper operating frequency to be increased well beyond the limit set previously by the gate capacitance in a conventional circuit design The modified design uses bandpass instead of lowpass filter structures A 17-30 GHz experimental amplifier has been designed and constructed as a hybrid demonstrator >

Patent
26 Feb 1988
TL;DR: In this article, the authors proposed a cascade filter consisting of four operational amplifiers in cascade, with switched capacitors in series at the input of every amplifier, with fixed capacitors at each amplifier in parallel to two of the remaining amplifiers, and with fixed and switched capacitance in common to groups of several amplifiers.
Abstract: The filter comprises four operational amplifiers in cascade, with switched capacitors in series at the input of every amplifier, with fixed capacitors in parallel to two of said amplifiers, with fixed and switched capacitors in parallel to the remaining amplifiers, and with fixed and switched capacitors in common to groups of several amplifiers in cascade. According to the invention, a path of fixed and switched capacitors in parallel connects the input of the filter to the input of the fourth amplifier, and a fixed capacitor connects the input of the filter to the input of the second amplifier.

Patent
23 Sep 1988
TL;DR: In this paper, an integrated circuit includes an operational amplifier having inverting and noninverting input terminals, a first logarithmic amplifier having non-inverting and inverting input terminals.
Abstract: An integrated circuit includes an operational amplifier having inverting and noninverting input terminals, a first logarithmic amplifier having inverting and noninverting input terminals, and a second logarithmic amplifier having inverting and noninverting input terminals. The output of the first logarithmic amplifier is connected to the noninverting input terminal of the second logarithmic amplifier, and the output of the second logarithmic amplifier is connected to the inverting input terminal of the operational amplifier.

Patent
15 Mar 1988
TL;DR: In this paper, a broadband, high speed, signal inverting video amplifier comprises a generally conventional, main cascode amplifier and first and second current boosting cascode amplifiers means which are capacitively coupled to the main cascade amplifier.
Abstract: A broadband, high speed, signal inverting video amplifier comprises a generally conventional, main cascode amplifier and first and second current boosting cascode amplifiers means which are capacitively coupled to the main cascode amplifier. The first current boosting amplifier provides a positive current spike in response to an input video signal abruptly decreasing, the positive current spike provided thereby being fed into the main cascode amplifier in a manner causing the current spike to be added to current through the main amplifier when the amplified video signal goes positive. The second current boosting amplifier provides a negative current spike in response to the input video signal abruptly increasing, the negative current spike provided thereby being fed into the main cascode amplifier in a manner causing the such current spike to be substracted from the current through the main amplifier when the amplified video signal goes negative. The positive and negative spikes cause the amplified output video signal to have rise and fall times to be less than about 3.5 nanoseconds at loads of at least about 25 pf at peak-to-peak output voltages of at least about 40 volts and to be no more than about 1.8 nanoseconds at about 20 volts peak-to-peak for a load of about 14.5 pf.

Patent
Michael McGinn1
15 Apr 1988
TL;DR: A wideband linearized amplifier as mentioned in this paper includes first and second differential amplifier sections each including differentially connected transistors and a linearizing element coupled between the emitters of first ones of the second pair of transistors of each amplifier section which cancels the nonlinear effects of the base-emitter junctions of the transistors.
Abstract: A wideband linearized amplifier includes first and second differential amplifier sections each including differentially connected first and second pairs of transistors and a linearizing element coupled between the emitters of first ones of the second pair of transistors of each of the first and second differential amplifier sections which cancels the non-linear effects of the base-emitter junctions of the transistors of the amplifier. The bases of the first pair of transistors of the first and second differential amplifier sections are respectively coupled to differential inputs of the amplifier while the bases of the second pair of transistors of the first and second differential amplifier sections are coupled to a reference potential. The collectors of the first pair of transistors and the first transistor of the second pair of transistors of the first differential amplifier section and the collector of the second one of the second pair of transistors of the second differential amplifier section are coupled to a first output of the amplifier while the collectors of the first pair of transistors and the first one of the second pair of transistors of the second differential amplifier section and the collector of the second one of the second pair of transistors of the first differential amplifier section are coupled to a second output of the amplifier.