Showing papers on "Comparator applications published in 2000"

A mismatch insensitive CMOS dynamic comparator for pipeline A/D converters

Abstract: A new fully differential CMOS dynamic comparator topology suitable for pipeline A/D converters with a low stage resolution is proposed. A thorough analysis of its function and a comparison to a widely used dynamic comparator are given in this paper. The proposed topology, based on two cross coupled differential pairs and switchable current sources, has a small power and area dissipation and it is shown to be very robust against transistor mismatch.

High speed bus system and method for using voltage and timing oscillating references for signal detection

Abstract: A system of the present invention uses small swing differential source synchronous voltage and timing reference (SSVTR and /SSVTR) signals to compare single-ended signals of the same slew rate generated at the same time from the same integrated circuit for high frequency signaling. The SSVTR and /SSVTR signals toggle every time the valid signals are driven by the transmitting integrated circuit. Each signal receiver includes two comparators, one for comparing the signal against SSVTR and the other for comparing the signal against /SSVTR. A present signal binary value determines which comparator is coupled to the receiver output, optionally by using XOR logic with SSVTR and /SSVTR. The coupled comparator in the receiver detects whether change in signal binary value occurred or not until SSVTR and /SSVTR have changed their binary value. The same comparator is coupled if the signal transitions. The comparator is decoupled if no transition occurs. The system may use a first set of oscillating references on a first bus for detecting transitions in control information and a second set of oscillating references for detecting transitions in data information.

Method and apparatus for voltage regulation in multi-output switched mode power supplies

Abstract: A step-down switched-mode power supply circuit includes a transformer having at least one primary winding and at least one secondary winding, a current sensing device for sensing a current through a primary winding of the transformer, a first switch and a second switch, a first comparator for determining if the current through the current sensing device exceeds a threshold, a voltage regulator coupled to the secondary winding to produce a regulated voltage, a second comparator for determining if the regulated voltage has drooped below an acceptable level, a counter coupled to the second comparator for generating a signal having a fixed number of switch cycles, and control circuitry for generating signals controlling the first switch and the second switch and responsive to the first comparator to enter a power saving mode disabling the signals, and to the second comparator to temporarily exit the power saving mode for a fixed number of cycles when the regulated voltage has drooped below an acceptable level.

Double differential comparator and programmable analog block architecture using same

Abstract: A double differential comparator can be efficiently implemented utilizing a first comparator stage having a folded cascode with floating gate input terminals and clamped single-ended output, and a capacitively coupled input stage for transferring a weighted sum of input signals to the floating gates of the first comparator stage. Additionally, the double differential comparator can be integrated into fully differential programmable analog integrated circuits. Such fully differential programmable analog integrated circuits can also include a differential output digital-to-analog converter to be used with or without the double differential comparator.

High efficiency electronic circuit for generating and regulating a supply voltage

Abstract: A high-efficiency electronic circuit generates and regulates a supply voltage and includes a charge-pump voltage multiplier which is associated with an oscillator and has an output connected to a voltage regulator in order to ultimately output said supply voltage Advantageously, the circuit comprises a first hysteresis comparator having as inputs the regulator output and the multiplier output, and comprises a second hysteresis comparator having as inputs a reference potential and a partition of the voltage presented on the regulator output The comparators are structurally and functionally independent of each other, and their outputs are coupled to the oscillator through a logic circuit to modulate the oscillator operation

Asymmetry control for an output driver

Abstract: A circuit for controlling signal levels on a transmission channel includes a comparator having a reference voltage input and a current control voltage input. A voltage divider is coupled to the current control voltage input of the comparator. The voltage divider includes multiple loads to divide voltages associated with a first output driver and a second output driver. The voltage divider also includes multiple switches to activate and deactivate loads in the voltage divider. A current control circuit is coupled to an output of the comparator. The current control circuit controls signal levels on the transmission channel in response to an output signal received from the comparator. Another circuit for controlling signal levels on a transmission channel includes a comparator that has a reference voltage input, a current control voltage input, and an offset control input. The offset control input is used to adjust the voltage offset on the transmission channel. A voltage divider is coupled to the current control voltage input of the comparator. The voltage divider divides voltages associated with a first output driver and a second output driver.

A high speed/power ratio continuous-time CMOS current comparator

Abstract: Current comparator is a fundamental component of current-mode circuits. A new high-performance continuous-time CMOS current comparator is proposed in this paper, which comprises one CMOS complementary amplifier, two resistive-load amplifiers and two CMOS inverters. A MOS resistor is used as the CMOS complementary amplifier's negative feedback. Because the voltage swings of the CMOS complementary amplifier are reduced by low input and output resistances, the delay time of the current comparator is shortened. Its power consumption is reduced by the resistive-load amplifiers. Simulation results based on 1.2 /spl mu/m CMOS technology parameters show the speed/power ratio of this new current comparator is better than existing high-performance current comparators. Besides, the new current comparator occupies small area and is process-robust, so it is suitable for high-speed and low-power applications.

Limitations of a relaxation oscillator in capacitance measurements

Abstract: Oscillation periods of a relaxation oscillator consisting of an op-amp-based integrator and a comparator are measured over a wide range of RC integration constants, and the results are compared with theoretical values derived in terms of the finite gain-bandwidth (GB) product and the slew rate of an op-amp and the response delay of a comparator The comparison validates the theoretical derivation which gives the design criteria of a relaxation oscillator for capacitance measurements and sensor signal processing

A simple high-speed low current comparator

Abstract: A high-speed low current comparator with low input impedance using a simple biasing method is proposed. Simulation results demonstrate the propagation delay is about 2.8 nsec and the average power consumption is 0.58 mW for 0.1 /spl mu/A input current at supply voltage of 3 V using 0.35 /spl mu/m CMOS technology.

Voltage monitor circuit with adjustable hysteresis using a single comparator

Abstract: A voltage monitor circuit for monitoring a first voltage includes a switch and a comparator. The switch has a first position and a second position. When the switch is in the first position, the switch connects the comparator to a first voltage terminal to monitor a second voltage. When the switch is in the second position, the switch connects the comparator to a second voltage terminal to monitor a third voltage. The second and third voltages are scaled voltages of the first voltage to be monitored. The comparator provides an output signal indicating a status of the first voltage, that is, whether the first voltage is within an operative range. The voltage monitor circuit may further include a voltage divider connected between the first voltage and a ground potential. The voltage monitor circuit of the present invention can be incorporated in an electrical system for monitoring a battery voltage. The voltage monitor circuit uses a user adjustable hysteresis to preclude operation of the electrical system under the 'bounce back' voltage. The voltage monitor circuit utilizes a single comparator and allows the user-selected hysteresis to be reproduced precisely in the monitor circuit.

High-speed comparator utilizing resonant tunneling diodes and associated method

Abstract: A high-speed comparator and an associated method are disclosed. The comparator utilizes input circuitry to receive the input signal and utilizes resonant tunneling diode (RTD) circuitry to provide a high or low level determination. The RTD circuitry may be made weak compared to the input circuitry to eliminate hysteresis, and the comparators may be cascaded together to provide a positive-gain. In addition, clocked switches may be added to the cascaded comparator circuitry to create a clocked quantizer for analog to digital conversion. If desired, the RTD circuitry may include two RTDs connected to the output signal, and the input circuitry may include a transistor connected as a source-follower and transistor connected as a current sink.

Inductive proximity sensor oscillator

Abstract: An inductive proximity sensor oscillator (A) having a differential comparator (38) in combination with a negative feedback network (38) and a positive feedback network connected to the comparator. The positive feedback network (22, 36) determines the frequency and amplitude of the generated oscillations. An LC resonant tank circuit (22) is connected between a non-inverting input (30) and a fixed reference voltage (20), and a current limiting resistor (36) connected between the non-inverting input and the output of the comparator. The negative feedback network (38) provides a simple, fast and reliable start-up mechanism. It comprises a capacitor (40) connected between the inverting input of the comparator and the circuit ground and a resistor (42)

Frequency adaptive negative voltage generator

Abstract: A negative voltage generator for an integrated circuit includes a charge pump responsive to the current loading on its output terminal. The charge pump is connected to a comparator which compares the output node of the charge pump with a reference potential. The comparator provides an analog output signal to a variable frequency oscillator, which in turn controls the charge pump. Variations in current loading caused the comparator to make appropriate changes in the oscillation frequency.

Digital amplifier with pulse insertion circuit

Abstract: A digital amplifier having an input for receiving an input signal employs an oscillator for producing a reference pulse signal and a sawtooth signal. A first generating circuit coupled to the oscillator is responsive to the reference pulse signal for producing a first pulse signal of a first polarity. A second generating circuit coupled to the first generating circuit is responsive to said first pulse signal for producing a second pulse signal of a polarity opposite the first polarity. A comparator responsively coupled to the input and said oscillator compares the input signal and the sawtooth signal and produces a comparator output signal operable between first and second states, for toggling the comparator output signal between the first and second states each time the input signal equals the sawtooth signal. The comparator output is maintained in the first or second state when the input signal exceeds the sawtooth signal. A pulse insertion circuit responsively coupled to the comparator and the first and second generating circuits produces an insertion signal during intervals when the comparator output is maintained in either of the first or second states.

Systems and methods for linearly varying a pulse-width modulation signal with a control signal

Abstract: A linear pulse-width modulator system is provided. The pulse-width modulation system of the present invention provides a pulse-width modulated (PWM) signal from a control voltage. The PWM signal varies linearly with the control voltage over a full range of duty cycles. The pulse width modulation system of the present invention has as plurality of comparators, each having one input coupled to a control voltage and a second input coupled to a periodic waveform signal provide by a waveform generator. The periodic waveform signals are identical except that each waveform is time delayed with respect to the other waveform signals. The outputs the comparators are coupled to a multiplexer which selects the output of each comparator as the PWM signal for a time interval corresponding to when the output signal of the comparator has substantially constant propagation delays. The propagation delays in the a comparator's output signal are substantially constant when the periodic waveform signal input of the comparator is not near the its minimum or maximum voltage.

AD converter with a power saving circuit and its control method

Abstract: The present invention provides an AD converter in which a first capacitor array is connected to one input of a comparator and a second capacitor array is connected to another input of the comparator and in which a charge proportional to an input analog signal level VAIN is accumulated in the first capacitor array. The AD converter comprises a level-adjusting capacitor whose one end is connected to the one input of the comparator to adjust a voltage of the one input of the comparator, to which the first capacitor array is connected, to a predetermined voltage; and switching means for switching a potential of another end of the capacitor to the potential that differs between a sampling mode and a comparison mode.

Method and apparatus for direct RAM analog-to-digital converter calibration

Abstract: In the present invention an ADC is calibrated using a matrix of selector elements to connect a plurality of reference voltages to a plurality of comparator circuits. Each selector element contains a switch connected to a memory cell. The switch is controlled to be on or off by the data in memory cell. When the switch is controlled to be on, a reference voltage at the input to the selector element is connected to the reference input of a comparator through the output of the selector element. A plurality of selector elements are connected to the reference input of each comparator in the ADC, and the selector element memory cells are programmed such as to allow one voltage from a range of reference voltages to be connected to each comparator. Each voltage in the range is a small voltage increment from the adjacent voltages connected to other selector elements. During calibration a reference voltage for each comparator is selected to allow the digital output of the ADC to be within a least significant bit of the value of the input voltage.

Semiconductor active fuse operating at high supply voltage employing current oscillation

Abstract: A high-voltage semiconductor active fuse has first and second semiconductor elements, a comparator for comparing the voltages of the first and second semiconductor elements with each other, a driver for supplying a control voltage to the control electrodes of the first and second semiconductor elements according to the output of the comparator, a first diode connected between a first input terminal of the comparator and a low-potential power supply terminal of the comparator, and a second diode connected between a second input terminal of the comparator and the low-potential power supply terminal through a resistor. When detecting an abnormal current, the active fuse turns on and off the first semiconductor element to cause current oscillations, which blocks the conduction between an external input terminal and an external output terminal. The active fuse needs no shunt resistor and is capable of quickly responding to an abnormal current caused by an incomplete short circuit failure.

Enhancements in testing devices on burn-in boards

Abstract: A system for testing semiconductor devices on device test boards has a single tester channel connected to multiple DUTs in a loop. Outputs from DUTs are received at a comparator and latch after a period of Round Trip Delay (RTD). The comparator is connected in a parallel configuration with the return path of the loop, where the point of connection is in greater proximity to DUT output pins than the test channel and is a path different from the tester I/O driver path, thus preventing input signals from test drivers from interfering with ouput signals from DUTs that will serve as inputs to test circuitry. The time it takes a new input cycle state to reach the output comparator is long after the output from a prior cycle has been tested. A diode clamp and resistor are connected in a series with the comparator at the input stage near the comparator in order to reduce ringing at the input of the comparator, which limits tester speed. Bus-switches composed of Field Effect Transistors (FET) electrically switch the input/output (I/O) of DUTs being tested to either exclusively drive or receive trace lines, respectively, reducing DUT pin loading and thus increasing achievable testing speed. The improved testing system functions in conjunction with a system designed to perform parallel test and burn-in of semi-conductor devices, such as the Aehr Test MTX System. The MTX can functionally test large quantities of semiconductor devices in parallel. This system of testing provides an effective and practical method for reducing overall test cost without sacrificing quality.

Comparator circuit for comparing differential input signal with reference signal and method

Abstract: A comparator circuit for comparing a differential input signal to a reference signal. A differential MOS transistor pair is provided having respective gates for receiving the positive and negative components of the differential input signal. A tail current source is coupled to the common sources of the transistor pair, with the current magnitude being related to the reference signal magnitude. The first and second transistors are made differently, typically by making the sizes different, so that the gate-source voltages differ when the transistor currents are equal. A comparator stage provides a digital output which changes state when the transistor currents are equal, with the difference in gate-source voltage representing the comparator trip voltage, a trip voltage related to the magnitude of the reference signal.

High-speed offset comparator

Abstract: A high-speed differential offset comparator circuit, providing a comparator function at a predetermined offset voltage. The differential offset comparator circuit includes a substantially zero offset comparator circuit having a first and a second differential input. The differential offset comparator circuit also includes a first pre-amplifier circuit and a second pre-amplifier circuit having an output coupled to the first and the second differential input, respectively, of the substantially zero offset comparator circuit. The pre-amplifier circuits are capable of providing a controllable offset to the differential offset comparator circuit. Each pre-amplifier circuit includes a first MOS transistor and a second MOS transistor connected in series to form a first composite transistor having an effective source, gate and drain. The first MOS transistor receives an input of the differential offset comparator circuit at a gate thereof. The second MOS transistor receives a control voltage corresponding to an offset control voltage at a gate thereof. The offset control voltage controls the value of the predetermined offset voltage.

Integrated circuit with a phase locked loop

Abstract: A phase regulator is connected, on the input side, to the output of a phase comparator and generates a control signal in a manner dependent on the phase difference ascertained by said comparator. Updating of the control signal fed to a control input of a first delay unit is triggered by an edge of the first output clock signal occurring at the clock output of the first delay unit.

Comparator, display apparatus using comparator for driving system, and driving method for comparator

Abstract: A comparator which can operate stably against an absolute value distribution of a threshold voltage among MOS transistors and has a wide allowable range against the threshold voltage dispersion and besides allows reduction in power consumption. The comparator employs a single MOS transistor, and a resistance element is connected between the drain electrode of the MOS transistor and a power supply. A capacitor is connected between the gate electrode of the MOS transistor and a dc potential point, and a switch is connected between the gate electrode and the drain electrode. A comparison reference level and comparison input data are inputted in a time series to the source electrode of the MOS transistor, and the MOS transistor performs a comparation operation.

A CMOS low-power, high-speed, asynchronous comparator for synchronous rectification applications

Abstract: A novel approach for the design of an asynchronous comparator implemented in standard digital CMOS technology for power supply applications is presented. The 1 mV sensitivity comparator is designed for asynchronous event detection, featuring a multi-stage topology for power efficiency and minimum propagation delay. It also contains a mixed-mode offset compensation architecture that allows full compensation in a single cycle. The comparator has been successfully used in the design of a very high frequency, 300 mA multi-mode PWM/PSM (Pulse Width Modulation/Pulse Skipping Mode) buck converter. The comparator is able to operate with a supply voltage as low as 2.4 V. Operating with a 3.6 V supply, under typical operating conditions, the comparator features a 19 ns delay consuming 161 /spl mu/W.

Electronic safe and arm apparatus for initiating a pyrotechnic

Abstract: An electronic safe and arm apparatus disposed in a projectile having a spin axis and a spin rate includes a battery; a power supply board connected to the battery, the power supply board including a mechanical G-switch that closes permanently at a predetermined acceleration, and a time-delay circuit connected to the G-switch; a firing board connected to the power supply board, the firing board including: an accelerometer that is oriented perpendicular to and disposed a fixed distance from the spin axis, an output of the accelerometer varying according to the fixed distance from the spin axis and the spin rate of the projectile; a comparator connected to the output of the accelerometer wherein the comparator compares the output of the accelerometer to a threshold voltage and an output of the comparator is low when the output of the accelerometer is less than the threshold voltage and the output of the comparator is high when the output of the accelerometer exceeds the threshold voltage; a rectifier connected to the output of the comparator; a firing capacitor, the rectifier being connected between the battery and the firing capacitor whereby when the output of the comparator is high the comparator saturates a gate of the rectifier thereby allowing the firing capacitor to charge; and an initiator connected to an output of the firing capacitor; and a timing board connected to the power supply board and the firing board, the timing board for setting and controlling a predetermined time delay for discharge of the firing capacitor into the initiator.

Adaptive comparator circuit and acoustic distance sensor comprising said circuit

Abstract: The invention relates to an adaptive comparator circuit comprising a comparator with a threshold value input which receives a threshold voltage and a signal input which receives a voltage signal. The threshold value input is connected to one pole by means of a switch and connected to the other pole of a first voltage source by means of a capacitor . The threshold value input is also connected to the signal input of the comparator by means of a diode or a second voltage source. The switch is controlled by the control signal of a signal transmitter. When the switch is in a closed position, the capacitor is charged with the voltage of the first voltage source. When the switch is in an open position, the capacitor is discharged in such a way that the threshold voltage of the signal voltage is corrected at a given time interval.

Reverse polarity protection circuit for current load has transistor switch with inverse diode connected in load current path controlled by comparator acting as Schmitt trigger

Abstract: The reverse polarity protection circuit has a transistor switch (2) and an associated inverse diode (2a) inserted in the load current path (3), controlled by a comparator (13) acting as a Schmitt trigger (7). The comparator is supplied with a voltage dependent on the load current and has an associated voltage regulator (10), regulating the difference between a positive and a negative supply voltage to a constant value. Also included are Independent claims for the following: (a) an electrical energy supply unit; (b) a rectifier circuit

Non-autonomous second-order chaotic circuit with comparator

Abstract: A novel non-autonomous nonlinear oscillator is suggested. The oscillator contains the integrator based second-order RC resonance loop, a comparator employed as a nonlinear device, and a buffer. When externally forced with periodic signal Asin(/spl omega//sub d/f), it exhibits a chaotic response in the certain bands of A and /spl omega//sub d/ parameters.

Reference -switch hysteresis for comparator applications

Abstract: The present invention concerns an apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a reference output voltage in response to a plurality of reference voltages. The second circuit may be configured to generate an output voltage in response to the reference output voltage and an unknown voltage. The output voltage may comprise accurately controlled hysteresis.