Showing papers on "DVB-S2 published in 2011"

Improving DVB-S2 performance through constellation shaping and iterative demapping

Abstract: Because it is widely supported by commercial-off-the-shelf (COTS) technology, the DVB-S2 waveform standard has become an attractive solution for military communication links. The waveform uses a combination of amplitude-phase-shift keying (APSK) modulation and low-density parity-check (LDPC) codes. Typical DVB-S2 implementations select signals from the APSK signal set with uniform probability. However, information-theoretic results suggest that performance may be improved by selecting lower-energy signals more frequently than higher-energy signals. In this paper, we propose and analyze a DVB-S2-compatible system that shapes the APSK constellation by selecting signals with a nonuniform probability. The receiver iterates between the APSK demapper, the shaping decoder, and the LDPC decoder. Using 32-APSK and a rate of 3 data bits per symbol, the system described in this paper achieves a gain of over 1 dB relative to a standard DVB-S2 system (i.e. one that does not use shaping or iterative demodulation) in additive white Gaussian noise (AWGN) at a bit-error rate of 10−5. About 0.7 dB of the gain can be attributed to shaping, and rest of the gain can be attributed to iterative demodulation and decoding. Lesser gains can be achieved over Rayleigh fading channels.

GPU-based DVB-S2 LDPC decoder with high throughput and fast error floor detection

Abstract: A new strategy is proposed for implementing computationally intensive high-throughput decoders based on the long length irregular LDPC codes adopted in the DVB-S2 standard. It is supported on manycore graphics processing unit (GPU) architectures, for performing parallel multi-threaded decoding of multiple codewords with reduced accesses to global memory. This novel approach is flexible and scalable, and achieves throughputs superior to the 90 Mbit/s required by the DVB-S2 standard, while at the same time it improves error-correcting performances such as BER and error floors regarding conventional VLSI-based decoders.

Two Step Based QoS Scheduler for DVB-S2 Satellite System

Abstract: The new DVB-S2 standard, introduced by ETSI, is mainly based on three key concepts: best transmission performance, total flexibility and reasonable receiver complexity. The Adaptive Coding and Modulation (ACM) scheme is the tecnique allowing to achieve these main goals. In particular, this tecnique allows to adapt the modulation and code levels, performed at the physical layer, at channel variations in a dynamic way. However, often the others modules, composing a satellite terrestrial terminal, does not take advantage of the ACM potentiality. For this purpose, in this paper we propose an efficient packet scheduling strategy able to operate with the different MODCOD schemes of ACM. In particular, considering ACM policy, Frame efficiency and QoS requirements the scheduling strategy has the main goal of maximizing the overall performances of the system.

method for carrying meta-data over digital video broadcasting-satellite second generation (dvb-s2) streams over the physical-layer framing structure

Abstract: A method of inserting meta-data into a physical layer framing structure of a Digital Video Broadcast Satellite-Generation 2 (DVB-S2) comprising encoding meta-data and an original carrier signal using an encoder, the original carrier signal having a pilot sequence, replacing, by a meta-data insertion device, at least a portion of the pilot sequence with at least a portion of the meta-data to form a meta-pilot carrier signal, modulating, using a modulator, the meta-pilot carrier signal to form a modulated meta-pilot carrier signal, and transmitting, using a transmitting device, the modulated meta-pilot carrier signal. Additionally, the meta-data may be inserted by a meta-data insertion device into at least a portion of the XFECFRAME structure when dummy-PL Frames are available when VCM and ACM operation is used.

Real-time DVB-S2 LDPC decoding on many-core GPU accelerators

Abstract: It is well known that LDPC decoding is computationally demanding and one of the hardest signal operations to parallelize. Beyond data dependencies that restrict the decoding of a single word, it requires a large number of memory accesses. In this paper we propose parallel algorithms for performing in GPUs the most demanding case of irregular and long length LDPC codes adopted in the Digital Video Broadcasting - Satellite 2 (DVB-S2) standard used in data communications. By performing simultaneous multicodeword decoding and adopting special data structures, experimental results show that throughputs superior to 90 Mbps can be achieved when LDPC decoders for the DVB-S2 are implemented in the current GPUs.

Adaptive packet scheduling for the support of QoS over DVB-S2 satellite systems

Abstract: This paper presents an adaptive algorithm for managing the weights of a weighted round robin (WRR) scheduler. The weights calculation depends on the capacity variations present in a Digital Video Broadcasting-Second Generation (DVB-S2) satellite link. The algorithm optimizes the bandwidth utilization while satisfying the QoS requirements for different traffic classes. The operation of the proposed algorithm is demonstrated by using the NS-2 simulator environment. The results show that the proposed adaptive WRR algorithm optimizes the bandwidth utilization while enforcing the priority level of each service class even in an extreme reduction of bandwidth caused by rain events.

Efficient multiplierless architecture for frame synchronization in DVB-S2 standard

Abstract: The first challenging step of the demodulation of the DVB-S2 signal with function of VCM (Variable Coding and Modulation)/ACM (Adaptive Coding and Modulation) is the detection of the Physical Layer (PL) header. PL header is transmitted using π/2-BPSK modulation and is composed of a fixed part (26 bits of Start Of Frame (SOF)) and a variable part (64 bits codeword of PL Signaling (PLS) code that defines the structure of the PL frame). Since the 90 bits corresponding to the PL header are affected by noise, the carrier frequency offset and the phase noise, the synchronization task in a DVB-S2 receiver is thus a critical task. In this paper, we present a properties of the Hadamard code used to encode the information of the PLS code to reinforce frame detection before knowing the actual value of the PL code. Moreover, we propose to perform the computation in the polar domain in order to avoid the need of multiplier and thus, to obtain a very low cost implementation. The associated decoder architecture is presented together with the measured performance at several SNRs.

DVB-S2 LDPC finite-precision decoder

Abstract: The latest standard of Digital Video Broadcasting (DVB-S2) features a powerful forward error correction system. This is enabled by replacing the concatenated Reed-Solomon/convolutional coding approach of DVB-S with a concatenation of an outer BCH code and inner low-density parity-check (LDPC) code, which is considered one of the most powerful codes known today and it can even outperform TurboCodes. In the decoding of LDPC code, huge data processing, storage, and interconnect requirements is a real challenge for decoder realization. For decoder hardware implementation, reduced complexity leads to low power consumption which might be a key implementation issue. This paper investigates the effect of the number of iteration and the decoder's input quantization to achieve a significant improvement in the hardware implementation of the decoder architecture and hence leading to lower delay, higher throughput, reduction of area and power consumption in the whole radio receiver.

A novel low complexity soft-decision demapper for QPSK 8PSK demodulation of DVB-S2 systems

Abstract: This paper provides an efficient low complexity soft-decision demapper algorithm for computing the log-likelihood-ratios (LLRs) of the 8PSK demodulations in the DVB-S2 standard. The proposed method has linear complexity, avoids the multiple square operations in the classical method and reduces the number of compare-select operations by half compared to traditional LLR computation algorithms. The demapper using the proposed method has been verified on Altera FPGA.

Study of BER in DVB-S2 satellite implemented in Matlab

Abstract: Satellite broadcasting has been considered lately as a promising media for IP streaming due to their wide coverage and high reliable bandwidth. Long propagation delay in GEO satellite system will affect the adaptive algorithms in DVBS-2/RCS systems. Long feedback delay will cause improper physical layer selection of modulation and coding (ModCod). This paper aims to provide an algorithm for physical layer selector in DVB-S2/RCS satellite systems. This algorithm will makeless ModCod switching of the adaptive coding and modulation (ACM) usingreduced number of ModCod combinations. We conclude that the number of ModCods in ACM algorithm can be relatively adjusted to maximize DVB-S2 system stability.

Hardware Efficient Root-Raised-Cosine Pulse Shaping Filter for DVB-S2 Receivers

Abstract: Hardware complexity of a root-raised-cosine (RRC) pulse shaping filter is dominated by the number of binary multiplications. In this paper an efficient multiplication scheme has been used to implement an RRC matched filter for Digital Video Broadcasting-Second Generation (DVB-S2) specifications. Nibble processing of the filter coefficients is performed to achieve computational efficiency. Quantization of the filter coefficient is used as a trade-off for the filter design. Twelve-bit quantized coefficients are used to obtain low hardware cost with satisfactory filter performance. Matlab simulation is used to compare and contrast the performance of an RRC filter with that of a standard floating point design. Hardware of the filter is simulated and synthesized using Xilinx ISE10.1. Implementation results show a 25% savings in LUT count. The use of nibble processing has the potential to reduce the hardware complexity of an RRC filter and is also applicable to other DVBS2 receiver schemes.

Generic Approach for Hierarchical Modulation Performance Analysis: Application to DVB-SH and DVB-S2

Abstract: Broadcasting systems have to deal with channel variability in order to offer the best rate to the users. Hierarchical modulation is a practical solution to provide different rates to the receivers in function of the channel quality. Unfortunately, the performance evaluation of such modulations requires time consuming simulations. We propose in this paper a novel approach based on the channel capacity to avoid these simulations. The method allows to study the performance of hierarchical and also classical modulations combined with error correcting codes. We will also compare hierarchical modulation with time sharing strategy in terms of achievable rates and indisponibility. Our work will be applied to the DVB-SH and DVB-S2 standards, which both consider hierarchical modulation as an optional feature.

Enhanced Channel Estimation for DVB-S2 Systems

Abstract: The aim of this paper is to study the potential improvement in nonlinear channel distortion and link quality estimation based on evolved pilots especially suited for the estimation of nonlinearities. In contrast to the constant-envelope pilots specied in the current DVB-S2 standard, a multilevel pilot design is proposed wherein pilots are taken from the same constellation as the user data. Simulation results indicate that amplier distortion and eective signal-to-noise ratio (SNR) at the demodulator input can be estimated more accurately for higher-order modulation than is achievable using constant-envelope pilots. Enhanced nonlinear channel equalization improves the bit error performance and improved SNR estimation can help to improve the threshold setting for adaptive coding and modulation procedure.

DVB-S2 Satellite Experiment Results

Abstract: With a large number of profiles and options, the DVB-S2 standard offers several possibilities to move towards the Shannon capacity bound and more in general to reduce the delivery cost per bit in real system scenarios, compared to previous generations of air interface. The information bit delivery cost with high quality of service is a key factor of success for both broadcast and interactive high throughput satellite systems. This paper presents the main results and findings of extensive European Space Agency (ESA) funded DVB-S2 test campaigns performed by satellite on three complementary test platforms, addressing broadcast, professional and interactive profiles. Different satellite transponders operating in C-band, Ku-band and Ka-band and located in Europe and in Canada have been used encompassing both single beam and multi beam satellite coverage. The performance of high order modulations has been measured, as well as the effects of payload impairments with and without mitigation techniques such as modulator pre-distortion and receiver equalisation, the impact of phase noise, etc. Particular effort has been dedicated to investigate the performance of Adaptive Coding and Modulation (ACM) in real and emulated conditions. The paper also provides recommendations concerning different tradeoffs to be made when operating DVB-S2 carriers, like optimization of ACM margins, amplifier back-off setting and insertion of pilot symbols.

Robust carrier recovery for DVB-S2 system

Abstract: This paper suggests the practical approach to mitigate phase noise by using joint detection and decoding scheme for DVB-S2 system. The proposed scheme illustrates in detail to implement robust DVB-S2 receiver compared to the previous study and shows the satisfactory performance when the specific LDPC decoding schedules have been utilized in the hardware implementation point of view.

Improved interleaving scheme for DVB-S2 BICM system

Abstract: DVB-S2 is used as the most popular standard for satellite communications for its efficient BICM structure and outstanding error performance. And the interleaver of DVB-S2 is a simple model with rows-reading columns-writing, wich is convenient for implementation. However, the error performance would be affected by the multi-edge modulated symbols, which can not be eliminated by the original simple interleaver. So in this paper, we focus on the impact of multi-edge LDPC symbols on the performance of the DVB-S2 system, and propose an improved interleaving scheme to prevent the performance degradation caused by the multi-edge modulated symbols. The new interleaving shceme can improve the decoding performance of DVB-S2 BICM system with a little extra computational complexity compared with the original interleaver. Simulation results show that the DVB-S2 BICM system with our proposed interleaver outperforms the traditional system in different code lengths, rates, modulations and channels.

TheFutureofSatelliteTV: The Wide Range of Applications of the DVB-S2 Standard and Perspectives Perspectives of digital TV and HDTV broadcasting are discussed in this paper, as are ongoing and future standardization activities and satellite hybrid and Internet Protocol TV.

Abstract: The first two generations of TV broadcasting are almost history, at least from the standardization perspective. Analog and digital satellite distributions both have addressed mass markets. The next-generation TV systems are close to primetime deployments: HDTV, 3DTV, interactive services, hy- brid services, and additional innovations will dominate the next-generation TV. With the efficiency and maturity of DVB-S2, satellite distribution is a cost-efficient and well-established broadcast technology with significant potential for extensions. In this paper, the future perspectives of digital TV and HDTV broadcasting will be first explored, considering ongoing and future standardization activities that will be carried out. Particular attention to innovative solutions based on adaptive modulation and coding, source and channel coding, and error resilience techniques for satellite TV transmission is paid. In addition to broadcast TV, also the perspectives of hybrid and IPTV will be considered in a satellite scenario with their pros and cons, trying to understand if satellite IPTV will be in competition with Bconventional( broadcast satellite TV ser- vices (like it already happens in terrestrial scenarios).

FPGA Design and Implementation of Low Power Consumption LDPC Encoder Based on DVB-S2

Abstract: According to DVB-S2 standard for LDPC (Low Density Parity Check) codes, a novel LDPC codes encoder circuit structure is designed. The design has been implemented on the FPGA (Filed Programmable Gate Array). Simulations results show that, due to the random nature of the input data, this structure significantly reduces the power consumption of the calculation circuit. Meanwhile, during the entire coding process, the data is processed parallelly and distributed storage so that we can not only enhance the information processing rate but also save storage space in FPGA.

OAM Technique Based on ULE for DVB-S/S2 Transmission Systems

Abstract: This paper presents a technique to monitor the performance of DVB-S/S2 transmission systems at the Link Layer (LL) level using the Unidirectional Lightweight Encapsulation (ULE) protocol. The technique is based on the use of extension headers and is validated for different traffic patterns. It has been designed to provide an Operation, Administration and Management (OAM) method for IP-based DVB-S/S2 systems using the MPEG-2 Transport Stream. Such methods can be used to identify edge-to-edge performance and connectivity issues in a layer 2 network.

Porting of an FPGA Based High Data Rate DVB-S2 Modulator

Abstract: : This paper covers a high data rate (HDR) DVB-S2 (Digital Video Broadcasting - Second Generation Satellite) modulator implementation that was designed to allow for rapid porting across a multitude of different software defined radio (SDR) platforms and scale accordingly to each platforms capabilities and limitations. The Naval Research Laboratory's (NRL) basic digital radio - one (BDR-1) SDR platform was chosen as a good candidate SDR platform to demonstrate the portability and scalability of the modulator implementation. The BDR-1 provided a significantly smaller form factor than the platform originally used to develop the HDR DVB-S2 modulator. It already had successfully demonstrated an NRL develop HDR waveform implementation, introduced in previous papers, which made it an ideal candidate. This paper will discuss the coding and architectural techniques used in order to increase the portability and scalability of the waveform; the steps taken to port the waveform to the BDR-1; and the end results.

Low complexity soft-decision demapper for DVB-S2 using phase selection method

Abstract: This paper presents a simplified soft-decision demapping algorithm using the phase selection method for Digital Video Broadcasting via satellite Second Generation (DVB-S2). To achieve a good Bit Error Rate (BER) performance of a Low Density Parity Check (LDPC) decoder and support higher-order modulation modes, the soft-decision demapper should require high hardware complexity. The proposed soft-decision demapping algorithm can reduce computation complexity by eliminating square operations. In addition, simulation results show that the proposed algorithm has negligible performance degradation compared with the conventional algorithms. Moreover, the proposed soft-decision demapper has been verified using the Virtex IV-LX 200 FPGA board. Comparing with the direct implementation, the proposed demapper can reduce about 81% hardware resources.

A Low Complexity Concealment Algorithm for H.264 Encoded Video over DVB-S2

Abstract: Due to the high level of compression, H.264/AVC video information is very sensitive to channel errors, and in particular the Variable Length Coding applied at the encoder side, together with Motion Compensation, can amplify the effects of transmission errors during the decoding phase. If, in addition, we consider that in real time applications lost or damaged data cannot be retransmitted, the importance to introduce concealment techniques in order to recover lost or corrupted video data emerges, through the exploitation of spatial and/or temporal correlation among the residual available information. In this paper we present a technique for polygonal edge interpolation, to improve the performance of Intra concealment in the case of video frames rich in details. Experimental results show that the proposed low complexity scheme may provide substantial improvements to the perceived video quality, confirmed by an increase in PSNR values.

A new decapsulating the frame method for DVB-S2 based on RM code

Abstract: The structure of the Physical Layer Frame (PLHFRAME) is flexible for DVB-S2 system. At the receiver, it is critical for decapsulating the frame design. By further analyzing the structure of the PLHFRAME, we find some useful properties and also introduce some optimizations into the algorithm. The algorithm is based on a first order Reed-Muller (RM) code to achieve decapsulating the frame. The design scheme has implemented on Xilinx Virtex xc4vlx25 FPGA. Hardware test results show that the new scheme can be achieved under large carrier frequency offset (as large as 5MHz at 25MSps) and low SNR threshold of −2.5dB.