Showing papers on "Frequency multiplier published in 1983"

High-Frequency Doubler Operation of GaAs Field-Effect Transistors

Abstract: A comprehensive study of single-gate GaAs FET frequency doublers is presented. Special emphasis is placed on exploring high-frequency limitations, while yielding explanations for previously observed lower frequency phenomena as well. Extensive Iarge-signal simulations demonstrate the underlying relationships between circuit performance characteristics and principal design parameter. Verifying experiments include straight frequency doubler and a self-oscillating doubler, both with output signal frequencies in Ku-band. The self-oscillating doubler appears especially attractive, yielding an overall dc-to-RF efficiency of 10 percent. The type of transistor employed in the numerical and experimental examples possesses a gate length of 0.5 µm and a gate width of 250 µm.

Numerical Steady-State Analysis of Nonlinear Microwave Circuits with Periodic Excitation

Abstract: A new method for determining the steady-state response of nonlinear microwave circuits with periodic excitation is proposed. The method minimizes time-domain calculations by introducing a criterion for selecting the variables to be considered as unknowns and for solving the resulting nonlinear system by a new and efficient algorithm. It has exhibited the capability for handling a large number of harmonics and nonlinearities. To illustrate the generality and usefulness of the method, a pumped diode and a MESFET frequency doubler are analyzed.

Double superheterodyne tuner

Abstract: In a double superheterodyne tuner, the first local oscillator frequency is set to a value higher than the first intermediate frequency, which is set to a value between three and five times the upper limit of the receiving frequency range. With this arrangement spurious signals of at least third or less order can be prevented from occuring in the first intermediate frequency range. The tuner comprises an input filter which attenuates interference signals whose harmonics equal a desired frequency. The second intermediate frequency may be selected such that it is obtained by subtracting the second local oscillator frequency from the first intermediate frequency which is higher than the second local oscillator frequency. As a bandpass filter for passing the first intermediate frequency may be used a coaxial dielectric filter so as to reduce interferences by undesired channel signals.

Digital frequency modulation system and method

Abstract: There is disclosed a new and improved frequency modulation system and method for providing a frequency modulated signal which varies in frequency from a center frequency in response to the amplitude of an analog modulating signal. The system and method utilizes a frequency shift synthesizer to provide the frequency modulated signal and digital techniques for quantizing the amplitude modulating signal and providing dividing factors to the frequency shift synthesizer responsive to the amplitude quantization.

A receiver for frequency hopped signals

Abstract: A receiver for frequency hopped signal on which an information signal is modulated on one of a plurality of equally frequency spaced carrier signals. A mixer receives the frequency hopped signals on one input, and on a second input, a local oscillator signal have a comb spectrum. The local oscillator signal is generated by a short pseudo-random bit sequence generator providing the continuous comb spectrum with a frequency spacing equal to the spacing of the carrier frequency signals. A plurality of auxiliary signals are generated having a frequency spacing equal to the carrier frequency signal spacings. The auxiliary signals will have the same frequency and spacing from each other for all carrier frequency signals. The modulator means can be used to separate one of the frequency constant auxiliary signals which includes modulation produced from any one of the plurality of carrier signals.

An electromagnetic proximity fuse

Abstract: The invention relates to an electromagnetic proximity fuse operating with transmission of an electromagnetic HF-wave and reception of a reflected wave received after reflection against an object, which reflected wave is combined with the transmitted one for generating a signal of doppler frequency (f a ) or so called doppler signal, which is used to initiate an ignition circuit. According to the invention the said doppler signal is led to an analogue divider (12) together with a delayed version of the said doppler signal. The analogue divider (12) delivers an output signal of doppler frequency (f d ), the amplitude of which is equal to the quotient between the prevailing value (U 1 ) of the doppler signal and the value of the doppler signal a predetermined time interval previously (U 2 ). This quotient signal of dopper frequency is led to a filter (15), which at least approximately has a frequency characteristic equal to 1/(f o + f), where f o is a system parameter and f is the input frequency, i.e. in the present case equal to the doppler frequency (f d ). The output signal from the filter (15) is finally led to an ignition circuit (17) via a threshold circuit (6) having a fixed threshold in order to initiate the ignition circuit (17), when the output signal from the filter exceeds a given value. Hereby the ignition circuit (17) will be triggered at a constant distance from the reflecting object independently of such unknown variables as the approaching speed, the reflection factor of the object and the gain factor of the HF-system.

Automatic oscillator frequency control system

Abstract: A frequency control system is provided which makes an initial correction of the frequency (f CLK ) of its own timing circuit (50, 52, 54, 56) after comparison against a frequency (f REF ) of known accuracy and then sequentially checks and corrects the frequencies of several voltage (13a 13e) controlled local oscillator circuits (12a 12e) The timing circuit initiates the machine cycles of a central processing unit (30) which, over a sampling interval having a duration of a fixed number of machine cycles, applies a frequency index (FI) to an input register (22) in a modulo-sum frequency divider stage (20) and enables a multiplexer (16) to clock an accumulator register (26) in the divider stage (20) with a cyclical signal derived from the oscillator circuit being checked Upon expiration of the interval, the processing unit (30) compares the remainder (FN) held as the contents of the accumulator (26) against a stored zero-error constant and applies an appropriate correction word (CW) to a correction stage (60a, 62a, 64a, 60e, 62e, 64e) to shift the frequency of the oscillator being checked A signal taken from the accumulator register (26) may be used to drive a phase plane ROM (94) and, with periodic shifts in the applied frequency index (FI), to provide frequency shift keying of the applied resultant output signal Interposition of the phase adder (90) between the accumulator register (26) and phase plane ROM (94) additionally permits phase shift keying of the output signal by periodic variation in the value of a phase index (PI) applied to one input port of the phase adder (90) An overflow signal may be taken from an adder (24) in the frequency divider stage (20) to drive an auxiliary counter (120) to provide a prescaling number which can be used by the central processing unit (30) to expand the correction range of the control system

Pulse-width modulation circuit with carrier signal frequency control

Abstract: A pulse-width modulation circuit detects a signal level or amplitude of an audio signal by means of an absolute value detecting circuit. The detected level is applied to a control terminal of a voltage-controlled oscillator. The output of the voltage-controlled oscillator is used as a carrier signal of the pulse-width modulation circuit, and the frequency thereof is controlled in such a manner that the carrier frequency is lowered as the audio signal level increases. Higher order harmonics of the pulse-width-modulated output signal both at high and low modulation factors are made substantially the same in amount. Thus, a band width required for the circuit is remarkedly narrowed, and improvement in distortion factor can be attained regardless of a low cost to manufacture.

Frequency synthesizer with improved priority channel switching

Abstract: A frequency synthesizer is provided including a reference frequency generator coupled to one input of a phase detector. The output of the phase detector is coupled via a pair of alternatingly connected filters through a voltage controlled oscillator and a divider circuit to the remaining input of the phase detector to form a phase locked loop. The first filter of the pair is designated for operation on a main channel frequency while the remaining filter is designated for operation on a priority channel frequency. The capacitive elements of each respective filter remain fully charged up for operation on their respective frequencies and thus when such filters are alternately switched between to change frequency from the main channel to the priority channel, the capacitive elements need not be charged to new levels to accommodate such frequency change. Thus, switching between a main channel and a priority channel is accomplished in a minimal amount of time with a significant reduction in frequency synthesizer energy requirements.

Methods and apparatus for rapid and accurate frequency syntonization of an atomic clock

Abstract: Methods and apparatus for rapidly and automatically syntonizing the frequency of a passive atomic resonator (12) of an atomic clock with a reference frequency which corresponds to the frequency of an external reference signal (58). Any difference between the hyperfine transition frequency of the resonator and the reference frequency generates an error signal which is used as a basis for automatically determining the magnitude of a quantity which adjusts the actual hyperfine transition frequency of the resonator.

Low power radio synthesizer with harmonic identification feature

Abstract: A channelized radio has a phase-lock loop which locks to any one of a pluity of carrier frequencies. These frequencies are harmonics of a reference signal. A harmonic identification circuit is disclosed which produces harmonics of a reference signal which is slightly offset from the original reference signal. The offset harmonic which is closest to the locked frequency is compared with the locked frequency and a difference measurement is produced. This difference measurement identifies the locked frequency and enables the operator to lock to a new frequency if desired.

Transistor oscillator/frequency doubler with optimized harmonic feedback

Abstract: A microwave transistor oscillator/doubler comprising a Field-Effect Transistor with Terminals G, D and S in combination with a coupling network connected to the terminals G, D and S and composed of microstrip lines with lengths equal to a quarter wavelength at the second harmonic of a fundamental frequency. The doubler further comprises a bias circuit for supplying appropriate voltages to the FET terminals, and an impedance coupler for coupling from the FET D-S terminals to a waveguide load. The coupling network optimizes feedback at the second harmonic between the D-S and G-S ports of the FET to prevent destructive harmonic feedback interaction with the desired signal while providing optimum conditions for feedback at the fundamental frequency. The bias circuit is connected to the coupling network and includes a second network of transmission line elements of lengths equal to a quarter wavelength at the fundamental in order to prevent dissipation of the fundamental frequency therein.

High efficiency high frequency power oscillator

Abstract: The invention relates to a high frequency, high mechanical energy output apparatus comprising a transducer, a filter circuit, and a driving circuit. The transducer and the filter circuit are serially coupled together, and the transducer operates at its fundamental frequency of oscillatory motion. The driving circuit serves to drive the transducer at its fundamental frequency and comprises first and second active devices, wherein each active device has an output circuit and a control circuit. Each of the active devices are cooperatively connected together and are responsive to control signals for producing an alternating output signal. There is also provided means coupling the output circuits of the active devices to the transducer so that an alternating series current signal is applied serially through the transducer. The filter circuit filters from the alternating series current signal substantially all harmonics of the fundamental frequency of oscillation of the transducer to produce a filtered series current signal. There is also provided means for coupling the filtered series current signal to the control circuits of the active devices such that the filtered series current signal constitutes the control signal for controlling each of the first and second active devices for producing an output signal from the driving circuit substantially at the fundamental frequency.

Statistics for Demodulation RFI in Operational Amplifiers

Abstract: An exper im en ta l i n v e s t i g a t i o n has been con ­ duc ted to de te rm ine th e s t a t i s t i c a l v a r i a t i o n s o f RFI demodulat ion e f f e c t s in o p e r a t i o n a l a m p l i f i e r s (op amps). Ampli tude-modu la ted (AM) RF s i g n a l s were i n j e c t e d i n t o th e n o n i n v e r t i n g i n p u t o f an op amp v o l t a g e fo l lo w e r c i r c u i t t o produce un­ d e s i r e d demodulated re sp onses a t 1 kHz AM-modulat i o n f r equ en cy . The RF fr equency was v a r i e d over th e range 0.1 to 400 MHz. The op amps i n v e s t i ­ ga t ed were th e 741 b i p o l a r op amp which has con­ v e n t io n a l npn in p u t t r a n s i s t o r s , t h e LM10 b i p o l a r op amp which has sl ow er pnp in p u t t r a n s i s t o r s , th e LF355 JF E T -b ip o la r op amp which has JFET i n ­ pu t t r a n s i s t o r s , and th e CA081 Bi-MOS op amp which has MOSFET in p u t t r a n s i s t o r s . Approximately 30 u n i t s o f each type were t e s t e d . Mean va lu es and s t a n d a rd d e v i a t i o n s were de te rm ined f o r demodula­ t i o n RFI. In t h e fr equency range 1 to 20 MHz where th e dem odula tion RFI e f f e c t s were l a r g e s t , th e mean va lues a re 10 to 20 dB lower f o r FETb i p o l a r op amps than f o r b i p o l a r op amps.

Frequency multiplier/divider apparatus and method

Abstract: Apparatus and method for generating an output signal as a function of an input, or reference signal. The apparatus consists of a numerically controlled oscillator having an output signal whose output frequency is determined by the input of a pair of frequency select inputs to the NCO. A control unit operates a multiplexer which allows one of the pair of frequency select inputs to be transmitted to the NCO. The increase in the number of variables provides an increase in the number of different step frequencies the FMD may be operated at.

DC-AC Power converter including two high frequency resonant link converters

Abstract: A DC to low frequency AC power conversion system includes two high frequency link inverters and a cycloconverter. DC input is fed to the high frequency links in parallel, and the outputs of the links are fed to a subtractor. The output of the subtractor is then fed to the cycloconverter. The difference between the first high frequency and the second high frequency of twice the respective frequency links is equal to the low frequency.

Frequency to current converter circuit.

Abstract: A circuit (10) receives a cyclic input signal having a frequency determined by a source (11), which frequency may vary in accordance with a parameter or condition to be measured, for example. The circuit (10) very precisely provides an output current representative of the frequency of the input signal. In particular, the circuit uses a pair of regulated and different voltages (16) (17), one (16) of which is impressed upon an averaging circuit (30) for a preselected time during each cycle of the input signal, and the other voltage (17) is impressed upon the averaging circuit (30) during the time when the first signal is not connected to the averaging circuit. A control signal (Vo) is developed from the averaging circuit (30) which is a function of the average of the voltage provided to the averaging circuit, and the control signal (Vo) in turn is used for controlling a current control amplifier (60) and transistors (61) (62) which in turn control current flow through a load (40) connected to output terminals (36) (37) and through a feedback resistor (63). The use of regulated voltage sources (16) (17) for deriving the current control signal insures great stability, relatively low cost, and precise operation.

Synchronizing signal generating apparatus

Abstract: A synchronizing signal generating apparatus comprises a first frequency generator for at least generating a frequency which is 4c times a chrominance subcarrier frequency of B, G, H, and I/PAL systems, where c is a factor of (625×n) and n is an arbitrary positive integer, a second frequency generator for generating a frequency which is (11×n) times a horizontal scanning frequency, a phase control circuit for comparing phases of an output of a first frequency divider which frequency-divides an output signal frequency of the first frequency generator by 1/64489 and an output of a second frequency divider which frequency-divides an output signal frequency of the second frequency generator by 1/(625×n) to supply a phase error signal in accordance with the compared result to the first frequency generator or the second frequency generator to variably control the output signal frequency of the first frequency generator or the second frequency generator, a third frequency divider for frequency-dividing the output signal frequency of the first frequency generator to produce a frequency equal to the chrominance subcarrier frequency, and a fourth frequency divider for frequency-dividing the output signal frequency of the second frequency generator by 1/(11×n).

Frequency converter with automatic frequency control

Abstract: An automatic frequency control system for use in a frequency converter of a time division communication system, wherein the nonmodulated portion contained in the burst signal is selectively frequency discriminated. The frequency discriminated output is held for a certain period of time and then used as the oscillation frequency control signal of a local oscillating means.

Digital frequency synthesizer for generating a frequency-modulated signal and radio frequency apparatus including such a device

Abstract: A digital device generating a frequency-modulated signal. The device comprises a programmable divider which divides the frequency fH of the clock by a variable integer N supplied by a control circuit. The output pulse signal of the frequency divider initiates the supplying of the next value of N by the control circuit. A shaping circuit brings the pulse signal into the form of a signal whose half-cycles successively have a duration equal to an integer multiple N of the clock period 1/fH. A supplementary circuit makes it possible to improve the precision of the modulation obtained compared with the desired phase by optionally delaying each half-cycle of the modulated signal by a fraction of the block period. The present invention is applicable to radar and telemetry.

Evanescent resonator frequency multiplier

Abstract: A frequency multiplier for electromagnetic waves in which multiples of the input frequency propagate, while the input frequency evanesces. A rectangular waveguide or other suitable wave conveying element with a cut-off frequency above the input frequency but below the output frequency contains the multiplying structure. The input frequency is multiplied using a post located in the waveguide or other element adjacent to the source of input waves. The post may define a multiplier gap between one of its surfaces and a wall of the waveguide or other element, in which case the multiplier gap may contain a multipactor between its surfaces which generates multiples of the input frequency. The multiplier gap may alternatively contain a non-linear element responsive to a high electric field, such as a ferroelectric material, which also generates multiples of the input frequency. Alternatively, the post may be surrounded by a non-linear element of ferromagnetic material responsive to a strong magnetic field. In either embodiment, waves at the same frequency as the input waves cannot propagate, but waves above the cut-off frequency propagate through the waveguide or other element to an output aperture.

High-efficiency Q-to-W-band MIC frequency doubler

Abstract: Integrated-circuit phase-lock oscillators are extremely difficult to develop above 60 GHz because of circuit losses. A viable alternative is to use a frequency doubler. A Q-to-W-band (40 to 80 GHz) frequency doubler has been developed using integrated-circuit suspended stripline. A conversion loss of less than 6.5 dB has been achieved with the output frequency at 80 GHz. This high efficiency was obtained by an innovative input and output matching circuit design. The advantages over a waveguide doubler include large reductions in size, weight and cost.

Frequency multiplier circuit for smiconductor integrated circuit

Abstract: PURPOSE:To keep the duty cycle of an output pulse constant at all times and to set it to a desired value, by detecting the duty cycle of the multiplied output pulse and controlling the delay time of an input pulse based on the result of detection. CONSTITUTION:The input pulse is branched into two; one signal is led to a variable delay circuit 10 in which the delay time is controlled in response to a delay control signal from a delay control circuit 12. The delay output pulse of the circuit 10 is led to a logical circuit 11 together with the other branch signal of the input pulse. The output of the circuit 11 is branched into two; one is multipled output pulse and the other is applied to the delay control circuit 12, where the duty cycle of the multiplied output pulse is detected and a delay control signal of a level in response to the difference between the duty cycle and a duty reference input is formed. Thus, the duty ratio of the output pulse is kept constant at all times and set to a desired value.

Compandor noise reduction circuit

Abstract: There is disclosed an analog signal processing circuit (compandor) and a method for overcoming noise in a transmission medium by means of a composite compressor and composite expander. The composite compressor splits the frequency spectrum of the analog signal into two or more frequency components, compresses all of the frequency components in parallel with the same 3:1 integer compression ratio, combines the compressed frequency components to produce a compressed analog signal, and transmits the compressed analog signal on the transmission medium. The composite expander reconstructs the original analog signal by means of feedback loop which extracts one of the compressed frequency components from the compressed analog signal, expands that extracted compressed frequency component to produce an expanded frequency component, derives the other expanded frequency components from the first expanded frequency component, compresses the derived expanded frequency components which are used to extract the first compressed frequency component, and a combining circuit which combines the expanded frequency components to reconstruct the original analog signal.

Method and circuit for phase lock loop initialization

Abstract: A method and circuit for quickly adjusting the frequency of a phase lock loop controlled oscillator to match a reference frequency signal by starting the reference frequency signal at essentially zero initial phase coincident with a zero crossing of the oscillator output. The reference frequency signal is provided by dividing a higher source frequency signal a predetermined amount. Upon receipt of an initialization signal the divider and the phase lock loop are inhibited. Upon the occurrance of a zero crossing the divider and loop are enabled so that the reference signal starts at zero phase within a predetermined period following the zero crossing, and the loop thereafter adjusts the oscillator frequency.

A frequency converter

Abstract: A frequency converter has a voltage controlled oscillator (5) which generates a local signal for use by mixing means (2) to frequency convert an input signal received by the mixing means (2). Discriminating means (3) detect error in the frequency of the frequency converted signal. A non-modulated portion (CR) of the input signal is detected (6) and a control signal indicating such detection controls means (4) which provide an error value based on error in frequency of the frequency converted signal as detected by the discriminating means (3) when such a non-modulated portion (CR) is detected. The voltage controlled oscillator (5) is controlled by the error value when providing the local signal for frequency conversion of a subsequently received modulated portion (BTR,PW,DATA) of the input signal.

Apparatus for and method of testing the conductive properties of a conductor

Abstract: The Figure shows a system for non-destructive detection of current restricting defects, such as cracks, narrowing, intermittent opens etc, in a conductor, e.g. a printed conductor. A composite test signal is applied to the test conductor 3 via probes 1 and 2. The signal is produced by a generator circuit 4 comprising a frequency (f o ) oscillator 5, amplifier 6 and D.C. source 7. The defects in the conductor 3 cause its resistance to vary at the same frequency as the oscillator signal and cause current variations through the conductor. The signal at node 4A comprises a component Vf o at frequency f o , a component 2f o GV at twice the frequency f o due to the resistive variation of the restricting defect and a component 2f o CV at two the frequency f o due to the resistance heating of the whole conductor. The f o component is rejected by filter 8 and the 2f o components amplified (9) and filtered by band pass filter 10. The amplified filtered signal is supplied as one input to a phase detector 12, the other input being derived from node 48, frequency doubler 14, band pass filter 15 and phase shifter 16. The detector 12 operates as a phase, sensitive demodulator to suppress the 2f o CV component and to compare the phase of the 2f o GV component with the 2f o component from phase shifter 16. The result of the comparison is manifested as a DC voltage which is logarithmically amplified and applied to indicator meter 18 and, via threshold detector 19, to defect indicator 20.

Energy control system with transmitter having channel multiplexing and frequency modulation

Abstract: A transmitter circuit adapted to transmit control signals to receivers which in turn activate fluorescent lamp fixtures. The transmitter comprises a frequency controllable oscillator and means coupled from the oscillator for providing alternating cycle control signals adapted to control the drive of the load. A divider circuit is used responsive to the oscillator frequency for providing a divided frequency signal of lower frequency of that of the oscillator. Feedback means including biphase means is responsive to the divided frequency signal and is coupled to the oscillator for controlling the oscillating frequency thereof. The oscillator output frequency is switchable at the divided frequency signal rate from a first frequency to a second frequency under control from the divider circuit. There is preferrably also provided frequency modulation control of the oscillator and in this regard the output of the divider circuit couples by way of a frequency modulation wave shape circuit to the frequency modulation input of the frequency controllable oscillator. Zero crossing detecting circuitry is also provided to reduce power consumption.

Low q body dithered laser gyro assembly

Abstract: A low Q ring laser gyro-dither motor assembly which is responsive to a wide range of frequency components of a drive signal having a randomly varying frequency such that the dither imparted to the gyro is frequency modulated by the drive. The frequency modulated dither varies the lock-in rate of the gyro as a function of the random drive signal to eliminate errors in the gyro output due to lock-in. The drive signal may be random in frequency only or random in both frequency and amplitude to provide the frequency modulation. Fixed frequency modulation may also be employed. The low Q assembly need not be driven at the natural frequency thereof so that a common drive circuit may be employed for a plurality of low Q gyro-dither motor assemblies forming an instrument cluster.