Showing papers on "Inverter published in 1985"

Current Control of VSI-PWM Inverters

Abstract: The inherent limitations of commanding voltages and currents in a three-phase load with an inverter are examined. An overview of several current controllers described in the literature is presented, and computer simulations are used to compare performance. A switching diagram is developed which reveals some of the operating characteristics of hysteresis controllers. For ramp comparison controllers, a frequency transfer function analysis is used to predict the line currents and provide some insight into the compensation required to reduce the current errors.

Suboptimal switching strategies for microprocessor-controlled PWM inverter drives

Abstract: The theoretical and practical development of a new suboptimal PWM switching strategy, based on well established regular sampling techniques, is presented. It is shown that this suboptimal PWM strategy closely approximates and exhibits many of the desirable performance characteristics of optimised PWM strategies based on minimised THD. The new suboptimal PWM strategy is based on a well defined modulation process which has the potential for on-line real-time microprocessor generation. This possibility is confirmed using both CAD and experimental results obtained from a microprocessor-controlled PWM inverter-drive system.

CMOS output buffer providing high drive current with minimum output signal distortion

Abstract: A CMOS output buffer provides high drive current without sacrificing speed and with minimum output signal distortion due to internal chip ground bounce or output signal ringing. The output buffer includes a pull-up circuit and a pull-down circuit which distribute switching current spikes over time. The pull-up circuit includes a P-channel FET and an N-channel FET connected in parallel between an output terminal and supply terminal VDD, with an inverter connected between the gates of the N-channel and P-channel FETs to provide the proper phase for the P-channel FET as well as delaying turn-on of the P-channel FET with respect to turn-on of the N-channel FET. The pull-down circuit includes a pair of N-channel FETs connected in parallel between the output terminal and ground, and a delay resistance connected between their gates so that turn-on of one of the N-channel FETs is delayed with respect to the other.

Dead beat microprocessor control of PWM inverter for sinusoidal output waveform synthesis

Abstract: A new control technique based on dead beat control theory to obtain a nearly sinusoidal PWM inverter output voltage is described. The closed loop digital feedback system measures the output and controls the inverter switches to generate the required PWM pattern to produce low total harmonic distortion (THD) sinusoidal output voltage. This scheme inherently provides very good voltage regulation, phase positioning and compensation for load disturbances and nonlinear loads. This paper presents a theoretical analysis, computer simulation and experimental results for a single-phase bridge inverter controlled by an Intel 8086 microprocessor based system.

A New Current Source GTO Inverter with Sinusoidal Output Voltage and Current

Abstract: A new current source inverter with sinusoidal output voltage and current is presented. Gate turn-off thyristors (GTO's) and pulsewidth modulation (PWM) control techniques are used in the current source inverter to produce the sinusoidal output voltage and current. Three capacitors are connected to the ac output terminals to absorb overvoltages which occur when the GTO current is cut off and to provide a filter function for reducing harmonics in the output current. Voltage spikes, which have been a serious problem in the practical application of this inverter, are suppressed by adding gate pulses which force the inverter into a state of shoot-through. Moreover, this inverter permits the capacitance of an ac output terminal capacitor for absorbing overvoltages to be reduced to one-tenth or less of that of a commutating capacitor in a conventional thyristor type current source inverter. A 3.7-kW induction motor is driven by the inverter. The motor efficiency and noise level are measured and compared with those obtained when the motor is driven by a conventional voltage source PWM inverter. An operating efficiency five or six percent higher and noise level 10 dB lower are obtained for the former. Therefore, this current source GTO inverter is very suitable for ac motor variable speed drives.

An SCR Inverter with an Integral Battery Charger for Electric Vehicles

Abstract: A thyristor-based inverter/charger for use in electric passenger vehicles is described, and prototype charger test results are presented. A battery charger is included integral to the inverter by using a subset of the inverter power circuit components. The integral charger employs the inverter commutation components as a resonant ac/dc converter rated at 3.6 kW. The resulting charger provides electrical isolation between the vehicle propulsion battery and ac line and is capable of charging a 25-kWh propulsion battery in 8 h from a 220-V ac line. Charger efficiency and power factor at an output power of 3.6 kW are 86 and 95 percent, respectively. The inverter, when operated with a matching polyphase ac induction motor and nominal 132-V propulsion battery, can provide a peak shaft power of 34 kW (45 hp) during motoring operation and 45 kW (60 hp) during regeneration. Thyristors are employed for the inverter power switching devices and are arranged in an input-commutated topology. This configuration requires only two thyristors to commutate the six main inverter thyristors. The combined ac inverter/charger package weighs 47 kg (103 lb).

Transparent shift register latch for isolating peripheral ports during scan testing of a logic circuit

Abstract: A transparent shift register latch (170) includes a normal operating gate (182) and a test gate (184) for selectively connecting data to a node (180). The node (180) is input to an isolation gate (186) through an inverter (188) for connection to an output node (190). A peripheral port (172) is interfaced with the output node (190) through an isolation gate (192). The gates (186) and (192) are operable in a test mode to interface data stored on the node (180) with the output of the latch (170) and inhibit input of data from the port (172). In the normal operating mode, the isolation gate (192) is closed and the isolation gate (186) is opened. The transparent shift register latch (170) allows testing of interface lines between adjacent logic modules.

Study and Implementation of Hysteresis Controlled Inverter on a Permanent Magnet Synchronous Machine

Abstract: In order to set up brushless dc servomotors, a specially designed permanent magnet machine has been associated with a transistorized inverter. First, the different parts of the machine/inverter/control assembly are described. Then a numerical simulation of this assembly is presented. This simulation has been used to study different control strategies that have been implemented on the experimental device: the results obtained are presented and discussed.

DC-AC inverter with overload driving capability

Abstract: A DC-AC inverter includes a bridge converter for converting an input DC into an output AC signal which uses field-effect transistors in the bridge circuit. The characteristics of the field-effect transistors enable the bridge converter to temporarily supply power in significant overload conditions. A DC-DC converter may also be included between the DC power source and the bridge converter to provide voltage boosting, when required. Field-effect transistors are also included in the DC-DC converter for power switching. The duration and amount of overload current output by the bridge converter is monitored and when an overcurrent condition beyond a predetermined amount or duration is detected, the bridge converter is disabled. The bridge converter is reenabled at a predetermined time thereafter. A plurality of field effect transistors may be connected in parallel at each location wherein a solid state power switching device is used in the inverter to thereby multiply the power handling capacity of the inverter as a whole.

Direct self-control of the flux and rotary moment of a rotary-field machine

Abstract: A method for controlling a rotating-field machine supplied from an inverter, the output voltage system of the inverter being variable with respect to amplitude, phase and frequency includes supplying amplitudes of stator flux components formed from measured stator current components and stator voltage components as actual value of a flux control loop, and changing the phase and frequency of the inverter output voltage system with a flux control as a function of a predetermined stator flux reference value by directly setting-in the switching state of the inverter and an apparatus for carrying out the method.

Uninterruptible power supply with isolated bypass winding

Abstract: An uninterruptible power supply including a transformer having a first input winding normally coupling an inverter AC source with a critical AC load, which transformer also includes a second input winding operable to supply power from a bypass source to the load in the event of malfunction of the inverter circuit The inverter is of the four-quadrant pulse-width-modulated type, thereby to permit recharging of the battery which serves as the DC source to the inverter An inductance is provided for varying the phase relationship between a utility voltage source and the inverter voltage to produce minimum real inverter current and the "break-even" operating conduction, and a step-up device is provided for increasing the utility voltage to further minimize the break-even inverter current required during normal operation, and to maximize the through-put efficiency

Method and apparatus for controlling pwm inverters

Abstract: An AC motor such as an induction motor or a synchronous motor is driven by a PWM inverter circuit. Power switching elements of the inverter circuit are ignited by PWM pulses resulting from comparison of a carrier wave signal with a sine wave modulation signal at a frequency proportional to a frequency setting signal so as to control the inverter circuit. A current polarity detector detects positive and negative components of a DC current flowing in the input side of the inverter circuit. The frequency setting signal is so corrected as to be decreased when only the positive current component flows in excess of one period of the carrier wave signal or increased when only the negative current component flows in excess of the one period.

Dynamically Optimal Switching Patterns for PWM Inverter Drives (for Minimization of the Torque and Speed Ripples)

Abstract: Several optimization criteria exist for pulsewidth modulation (PWM) inverter control as applied to ac motor drives. Drive dynamics, i.e., torque and speed ripples, are analyzed and optimized. As a representative example, the PWM inverter control is assumed to have three and five degrees of freedom. These degrees of freedom are realized by so-called switching angles which determine the inverter output voltage waveshape. This voltage is applied to an induction motor. Analysis is executed for a steady-state approximation (using Fourier analysis) as well as for the rigorous fifth-order dynamic equations. The results are compared. The optimal solution for the switching angles as a function of the voltage fundamental is shown. The location of the optima is compared with the efficiency optimal control presented in an earlier paper. A means is provided to compare results for different optimization criteria in order to reach an overall optimum as the best compromise between the results gained from the different optimization methods.

High voltage decoder

Abstract: A high voltage CMOS decoder and level translator for use in conjunction with EPROMS and EEPROMS utilizes additional series coupled field effect transistors maintained in an on condition so a to prevent the voltage across the pull-up and pull-down field effect transistors from exceeding their break down voltages. For example, in addition to a pull-up P-channel field effect transistor and a pull-down N-channel field effect transistor in the output inverter circuit, additional P-channel and N-channel field effect transistors are coupled in series between the pull-up and pull-down transistors to maintain the voltage across the pull-up and pull-down transistors from exceeding there breakdown voltages.

Wireless emergency lighting unit

Abstract: A circuit is disclosed herein for use in series with a fluorescent lamp and a conventional ballast for supplying operating current to the lamp when the main line source of power has been interrupted. The circuit includes a sensor for detecting the lamp current and utilizes the lamp current for charging a storage battery via a battery charger. An inverter ballast circuit is normally maintained in an "OFF" condition by the sensor and is responsive to the sensor when the power source to the lamp has been interrupted so that the power from the battery is applied to the inverter ballast to turn it to the "ON" condition. Conduction of the inverter ballast circuit provides AC voltage to energize the fluorescent lamp through the conventional ballast.

Phase modulated, resonant power converting high frequency link inverter/converter

Abstract: The invention relates to a power processing technique and device wherein a tank circuit is excited at resonance, in association with two phase modulated high frequency link converters in an arrangement wherein control of the operation is easily achieved even with operation at resonance. The tank circuit is series resonant and is connected on the primary side of a transformer between two full bridge inverters and serves to control operation of the device even when operated at resonance. The technique finds special utility in power conversion applications.

A novel type induction-heating single-ended resonant inverter using new bipolar Darlington-Transistor

Abstract: Demonstrated is a novel type of single-ended resonant inverter using a new Bipolar Darlington-Transistor that operates efficiently in the frequency range of 20kHz to about 50kHz. The inverter implementation for an induction-heating range includes a unique power control strategy. The analysis and performance evaluations for circuit design are carried out herein.

Semiconductor storage device

Abstract: PURPOSE:To speed up the operation of a device in writing and reduce the power consumption by charging bit lines by using the information of a write control signal line only when a memory cell is not in a write state. CONSTITUTION:The output of a CMOS inverter logical circuit 19 is connected to a bit line 8 and the input is connected to the output a CMOS logical circuit 20 in a writing circuit 50. Similarly, the output of a CMOS inverter logical circuit 23 is connected to the bit line 9, and the input is connected to the output of a CMOS logical circuit 22. One input of both logical circuits 20 and 22 is connected to the write control signal line 17, and the other input is connected to the output of a CMOS inverter logical circuit 21; and the input of this logical circuit 21 and the other input of the logical circuit 22 are connected to an information input signal line 13. Write information inputted externally through the information input signal line 13 during writing operation is transmitted to the bit lines 8 and 9, and the bit lines 8 and 9 are charged up to the source voltage value when the writing operation is not performed.

Method and apparatus for controlling PWM inverter

Abstract: In the control of a PWM inverter, there are various requirements such as decreasing a harmonic loss and acoustic noises, improving control response, optimizing switchings of the branches of the inverter in any condition, and simplification in circuit construction. In the present invention, the branches of the inverter are controlled in such that an evaluation function on the whole combination of the inverter and the load connected to the AC side of the inverter is made to be minimized.

A loss minimised sinusoidal PWM inverter

Abstract: Traditional PWM AC motor drives perform well over a wide speed range and have many positive features associated with their simplicity. However, the waveforms used are significantly less than ideal at high modulation depths and low switching rates, particularly with regard to harmonically induced motor losses. An improved strategy for digitally producing PWM based on conventional triangulation methods is presented. A novel technique for reducing the harmonic losses resulting from sinusoidal PWM waveforms is analysed in depth and realised on a 40 kVA inverter. Tests with this inverter on 7.5 kW and 15 kW motors confirm that the inverter's performance is significantly enhanced for certain operating conditions, without any significant sacrifice.

Efficient snubbers for voltage-source GTO inverters

Abstract: The two gate turn-off thyristors in the phase leg of a voltage-source inverter are provided with a series center-tapped inductance snubber and shunt capacitor snubbers having a single discharge resistor and only two auxiliary diodes. This arrangement minimizes the number of components and allows reduction of capacitor size, thereby reducing the snubber losses. The resistor may be replaced by a transformer which conserves a substantial part of the energy trapped in both the series and shunt snubbers.

Apparatus for controlling an elevator

Abstract: An elevator control system connected to a source of three-phase alternating current which is rectified by a converter to direct current which is converted to a variable-voltage variable-frequency A.C. voltage which, in turn, drives the elevator hoist motor. A resistor and a switch are connected across the D.C. terminals of the converter. When the motor is operating in the regenerative mode, the switch is closed to permit the regenerated circuit to flow through the resistor which dissipates or consumes the regenerated power. When the regenerated power being consumed by the resistor is detected to exceed a predetermined value, the excess regenerated power is returned to the A.C. source through a regenerative inverter.

Electronic ballast with high power factor

Abstract: A source of 120 Volt/60 Hz power line voltage is full-wave-rectified and yields an unfiltered DC voltage pulsed at 120 Hz rate. This pulsed DC voltage is applied to an inverter of a type that must be triggered into oscillation. At the beginning of each of the DC voltage pulses, the inverter is triggered into oscillation; and at the end of each of the DC voltage pulses, the inverter ceases to oscillate frm lack of adequate voltage to sustain oscillation. The output of the inverter is a 30 kHz squarewave voltage amplitude modulated at the 120 Hz rate. Across the inverter output is connected a high-Q series L-C circuit resonant at about 30 kHz. A fluorescent lamp is connected in parallel with the tank capacitor of the L-C circuit. With is high-Q resonant L-C circuit series-excited and parallel-loaded, the instantaneous magnitude of the current drawn by the inverter is substantially proportional to the instantaneous magnitude of the DC voltage provided; which implies that power is drawn from the power line with a relatively high power factor.

Resonant vector control base high frequency inverter

Abstract: The authors introduce a new configuration of resonant type high-frequency inverter which has inherent fast-response Variable Voltage Variable Frequency (WVF) strategy and high power adaptability

Source follower cmos input buffer

Abstract: An input buffer has input and output inverters. An n-channel transistor is coupled as a source follower between the inverters. The buffer receives a TTL input and provides a CMOS output. The source follower transistor has a large channel width and provides substantial pullup. The output inverter stage can be made larger. A p-channel transistor in parallel with the n-channel source follower transistor permits the internal node to reach a full Vcc level. Another n-channel transistor driven by the input signal permits the node to reach ground.

TTL/CMOS compatible input buffer

Abstract: A TTL/CMOS compatible input buffer includes an input inverter and a reference voltage generator. In the TTL mode, the reference voltage generator supplies a reference voltage to the source of the P-channel transistor in the inverter having a magnitude which forces the trigger point of the input inverter to assume a preselected value. Typically the preselected value is selected to be 1.4 volts in order to maximize the input noise margins. A second stage input inverter introduces hysteresis to improve the noise immunity of the system. The reference voltage generator includes an operational amplifier connected to a voltage divider network. In the CMOS mode, the reference voltage generator is disabled and a voltage equal to power supply voltage is provided to the input inverter. As a result, the trigger point of input inverter is higher than 1.4 volts which provides a larger input noise margin. The voltage divider network and the operational amplifier are powered down so that no DC power is consumed.

Control for a neutral point clamped pwm inverter.

Abstract: Prior types of neutral point clamped PWM inverters have included memories for storing a plurality of PWM waveforms, one of which is utilized to control switches in the inverter to maintain an output parameter within prescribed limits. Such types of inverter controls, however, cannot provide the necessary degree of regulation in some applications. To overcome this problem, an inverter control according to the present invention permits on-line generation of PWM patterns for a neutral point clamped PWM inverter. The control includes circuitry for generating a depth of modulation signal representing the deviation of the output of the inverter from a desired level. A microprocessor and memory are coupled to the generating circuitry for calculating switching points for the inverter switches during operation of the inverter based upon the depth of modulation signal for a given number of pulses to be produced during each half cycle of the output. Timer modules are coupled to the microprocessor for developing switch control signals for each switch from the switching points so that the switches are operated to reduce the deviation of the output from the desired level.

Flash strobe power supply.

Abstract: A flash strobe power supply adapted for controlling alternately the energization of a pair of flash lamps includes a trigger timing device (48) for generating a series of positive pulses and a series of negative pulses spaced in time from the positive pulses by a predetermined interval. First and second energy storage devices (24, 26) are provided for repeatedly charging incrementally during successive charging cycles and for storing a charge to be applied to respective first and second flash lamps (32, 34). An inverter oscillator circuit (20) includes a pulse width modulator and a transformer for generating a quasi-square wave signal whose frequency is greater than the frequency of the positive and negative pulses to control the incremental charging of the energy storage devices. First and second switching devices (40, 42) deliver when conductive the charge stored in the first and second energy storage devices to their respective first and second flash lamps. A first switching means is responsive to the positive pulses of the timing device for rendering it conductive to permit the discharging of the charge stored in the first energy storage device through the first flash lamp. The second switching device is responsive to the negative pulses of the timing device for rendering it conductive to permit the discharge of the charge stored in the second energy storage device through the second flash lamp. Anti-saturation circuit (54) responsive to the quasi-square wave signal prevents saturation of the primary winding of the transformer by disabling of the pulse width modulator which avoids further incremental charging of the first and second storage devices.

A Simple Control System for Current Source Inverter-Fed Induction Motor Drives

Abstract: A simple control system for induction motor drives with the current source inverter is presented. This system is based on the idea of field-orientated control. In contrast to well-known ways of realization a torque proportional quantity is calculated from stator voltage and current without explicit flux calculation or integration. A speed sensor is not required. The theoretical principles of this method are discussed. Some transients which illustrate the performance of some different system variants are presented.