Showing papers on "Synchronous frame published in 2005"

Continuous and discrete variable-structure controls for parallel three-phase boost rectifier

Abstract: We describe three nonlinear control schemes for a parallel three-phase boost rectifier consisting of two modules. The basic idea, however, can be extended to a system with N modules. All of the control schemes are developed in a synchronous frame. Moreover, each of the closed-loop power-converter modules operates asynchronously without any communication with the other module. Based on the dynamical equations of the parallel converter, we find that independent control of both of the modules on the DQ axes is not necessary and possible. Consequently, we develop control schemes that stabilize the dq axes and limit the zero-axis disturbance by preventing the flow of the pure zero-sequence current. One of the control schemes is developed purely in the discrete domain. It combines the space-vector modulation scheme with a variable-structure control, thereby keeping the switching frequency constant and achieving satisfactory dynamic performance. The performances of the other control schemes are also satisfactory.

Trinary hybrid multilevel inverter used in STATCOM with unbalanced voltages

Abstract: The application of trinary hybrid multilevel inverter in synchronous static compensation (STATCOM) with unbalanced voltages is investigated. Benefiting from trinary hybrid topology of the inverter, the cost of STATCOM is reduced because of not only fewer switching components but also reduced cost of cooling systems and DC capacitors. The combination of vector control based on synchronous frame and staircase modulation is used in the STATCOM system presented to regulate reactive power or balance bus voltages under balanced or unbalanced conditions. To achieve this control aim, a new method based on the comparison of reference amplitudes and reference signals is presented. The performance of the proposed control strategy is confirmed by simulation and experiment.

Advanced Synchronous Reference Frame Controller for Three-phase UPS Powering Unbalanced and Nonlinear Loads

Abstract: This paper describes a high performance voltage controller for 3-phase 4 wire UPS (uninterruptible power supply) system, and proposes a new scheme of synchronous reference frame controller in order to compensate for the voltage distortions due to unbalanced and nonlinear loads. Proposed scheme in this paper is able to completely eliminate the negative sequence voltage distortion due to unbalanced loads and also reduce the harmonic voltage distortion due to non-linear loads, even if the bandwidth of voltage control loop is a very narrow. Therefore, the proposed scheme is especially appropriate for a fully digital controlled UPS or a high power UPS with limited voltage control bandwidth. In order to compensate for the effects of unbalanced loads, the synchronous reference frame controller with the positive and negative sequence computation block is proposed, and the synchronous frame controller with a bandpass filter is proposed to compensate for the selected harmonic frequency of output voltage. The effectiveness of the proposed scheme has been investigated and verified through computer simulations and experiments by a 30 kVA UPS

A DQ Synchronous Reference Frame Control for Single-Phase Converters

Abstract: This paper presents a current control using the DQ synchronous reference frame for single-phase converters. This control method consists in transforming an orthogonal pair composed by the actual single-phase input current and a fictitious current, from a stationary to a rotating frame. The steady state current components in DQ frame become DC instead of AC values so a zero error current control can be implemented. A single-phase PFC boost rectifier is used as an example application of this control. To validate the control method simulation and experimental results are presented. I. INTRODUCTION Single-phase converters with input current regulation are widely used in several applications such as Active Power Filters, Power Factor Control (PFC) Rectifiers, Uninterrupted Power Supplies (UPS), Photo-Voltaic Generation, etc. (1). The current regulation is based on current control loops, however for AC power converters it is not simple to design this controllers, due their time variant currents and voltages. For DC converters it is quite simple to design linear current controllers with no steady state error, but if the AC controllers are designed the same way as DC controllers, a significant steady state error in both amplitude and phase may occur. In three-phase systems the steady-state AC quantities be- come DC by means of the transformation from ABC static frame to dq synchronous frame. To perform this transformation in a single-phase system it is necessary to create a second quantity in quadrature with the real one so as to apply the transformation from the static to the synchronous frame. In the technical literature this second quantity is obtained either using the capacitor current feedback (2) , delaying the real one by 1 of the line period or by means of notch filters tuned at twice the line frequency (3), (4). Figure 1 shows some of this methods. The control presented in this paper is based on the detection of the frequency and phase of the input voltage by a PLL and then generates a fictitious input current. The proposed method neither requires tuned filters nor store samples to produces a quarter cycle delay. Using this method the current control can also be made unsusceptible to switching noise with a proper PLL design. A proper choice for the current peak value also make possible the reduction of the computational requirements in a digital implementation.

Advanced Synchronous Reference Frame Controller for three-Phase UPS Powering Unbalanced and Nonlinear Loads

Abstract: This paper describes a high performance voltage controller for 3-phase 4-wire UPS (Uninterruptible Power Supply) system, and proposes a new scheme of synchronous reference frame controller in order to compensate for the voltage distortions due to unbalanced and nonlinear loads. Proposed scheme can eliminate the negative sequence voltage component due to unbalanced loads and also reduce the harmonic voltage component due to non-linear loads, even when the bandwidth of voltage control loop is a very low. In order to compensate for the effects of unbalanced loads, the synchronous reference frame controller with the positive and negative sequence computation block is proposed, and the synchronous frame controller with a bandpass filter is proposed to compensate for the selected harmonic frequency of output voltage. The effectiveness of the proposed scheme has been investigated and verified through computer simulations and experiments by a 30kVA UPS.

Method of configuring system layers for synchronous Ethernet

Abstract: A method of configuring system layers for a synchronous Ethernet is provided. In the method, a physical layer takes charge of input and output of an Ethernet frame in direct relation to hardware, an xMII (x Media Independent Interface) layer connects the physical layer to a data link layer. The data link layer has a sync frame processor for processing a synchronous frame and an async frame processor for processing an asynchronous frame. A parser and multiplexer (MUX), included in the x MII layer, construct a super frame with a synchronous frame and an asynchronous frame, transmit the super frame through the physical layer, parse a received super frame into a synchronous frame and an asynchronous frame, and transmit the synchronous and asynchronous frames to the data link layer.

Fast harmonics compensation in VSCs connected to the grid by synchronous-frame generalized integrators

Abstract: The drawback of using a VSC as an interface with the grid is its sensitivity in presence of system disturbances as grid voltage harmonics. In this paper, a new current controller structure to harmonics compensation is proposed. It consists of using two control loops. The first is based in synchronous PI working in rotating coordinates with DC components; and the second uses synchronous-frame generalized integrators (Gl) tuned to the harmonics frequency. The proposed algorithm temporal responses under grid voltage harmonics are presented, and also, the proposed digital control electronics system, where the algorithms run, is shown.

Análise e implementação de retificadores PWM trifásicos com resposta de tempo mínimo utilizando desacoplamento por retroação de estados

Abstract: This paper develops a systematic design procedure based on discrete decoupling by state feedback applied to three-phase PWM rectifiers. A discrete model for synchronous frame is developed for three-phase PWM rectifier with an L filter. This model takes into account the computational delays presents in the discrete implementation. Deadbeat response is obtaining without the requirement of a current controller in the axis d. Moreover, discrete servo controllers to ensure unit displacement power factor and regulated DC link voltage are developed. Finally, experimental results are presented to demonstrate the feasibility of the proposed procedure, algorithms and the performance of the overall system.

Novel current control strategy for maximum tracking operation under saturated voltage condition

Abstract: A synchronous frame proportional integral (PI) current controller has been widely used in AC electric machine drive system. This current controller should contain an anti-windup scheme to prevent the integral term in the controller from blowing up. This paper addresses the reference tracking performance of current controller with the anti-windup when the output of the PWM inverter is saturated due to limitation of DC bus voltage. The problem of the conventional PI current controller caused by the inverter saturation is identified in a viewpoint of the reference tracking, and a novel current control strategy is proposed. The proposed current control strategy shows the better tracking performance without blowing up the integral term in controller even in the case of inverter saturation. Experimental and computer simulation results are shown to verify the effectiveness of the proposed strategy.

Transmission apparatus and transmission system

Abstract: Switching control apparatus and method between LAN interface terminals that are accommodated in a ring network including a synchronous network. A transmission system which is capable of performing high-speed redundant switching in the event of a failure of a transmission path regardless of the number of rings in a multi-ring configuration includes a first transmission apparatus connected to a first terminal has a LAN interface for sending and receiving an ordinary packet, and a synchronous frame interface for sending and receiving a synchronous frame to and from a second transmission path, a link detector for detecting a physical link failure of the first transmission path. The system also includes a second transmission apparatus connected to the first transmission apparatus and also connected to a second terminal. The second transmission apparatus has a synchronous frame interface for sending and receiving a synchronous frame.

Data frame construction method and data processing method according to data frame

Abstract: Disclosed is a method for constructing a frame of data for transmission by each Ethernet device in a synchronous Ethernet, which comprising the steps of receiving the data for transmission and confirming whether or not the data for transmission are synchronous data, when the received data are synchronous data, marking that the data are synchronous data in a preamble of the frame and constructing a synchronous frame by including the received data into a data portion of the frame which does not contain a MAC header and when the received data are asynchronous data, marking that the data are asynchronous data in the preamble of the frame and constructing an asynchronous frame by including the received data into a data portion of the frame containing a MAC header.

Modeling and Simulation of Induction Motors Considering Iron Loss

Abstract: A state equation for induction motors considering iron loss in the synchronous frame was developed in order to separate the states and the parameters of induction motors.Then,the simulation model of the motors with iron loss and variable parameters was established based on a MATLAB C MEX-file S-function.The validity,effectiveness and speediness are verified by simulations.The proposed high-efficient model provides a more accurate approximation to actual induction motors for many control problems of induction motor drives.

Digital pll circuit

Abstract: PROBLEM TO BE SOLVED: To provide a digital PLL circuit capable of precisely generating synchronous frame signal for stable PLL operation that synchronizes with the inputted reference frame signal with no increase in scale of the circuit. SOLUTION: The digital PLL circuit comprises a phase comparator 1 which compares the phase of the reference frame signal with that of the synchronous frame signal for outputting phase error signal, a digital filter 2 for filtering the phase error signal, an error signal conversion part 3 which divides the phase error signal that has been filtered with a sample number to output integer part and fraction of the error signal, a reference sampling cycle generator 4 for generating a reference sampling cycle, an adder 7 which adds the integer of the error signal to the reference sampling cycle for generating a sampling cycle, a sampling clock generator 5 which modulates the sampling cycle based on the fraction of the error signal, and a synchronous frame signal generator 6 which counts the modulated sampling clock with sample number for generating a synchronous frame signal. COPYRIGHT: (C)2005,JPO&NCIPI

Current Harmonics Analysis of The DG Interconnection by Modeling and Simulation

Abstract: The modeling and simulation of a simplified interconnection system consisting of a distributed generation (DG) unit connected to grid via inverter interface is addressed in this paper. The inverter interface is controlled with synchronous frame PI current controller. The task of tuning of controller is done with MATLAB. The current harmonics should be limited according to the requirement of relevant standards, such as IEEE Std. 1547. Theoretical calculations with Bessel function are performed to find suitable filter inductance values with reasonable switching frequency. The simplified interconnection model is realized and simulated in PSCAD. For validation of the method of filter inductance selection, the Matlab is used for analyzing current harmonics to improve the accuracy

A new scheme for three-phase PWM converter without AC voltage sensor

Abstract: The paper present an optimal robust waveform controller using H/sub /spl infin// optimization theory for three phase converter. In general D-Q axis synchronous frame to realizing a decoupling current control, the input net voltage must be measured. To decrease the cost and control the system at ease, a new scheme for three phase PWM converter without net voltage sensor is present in this paper. The input voltages in the system are treated as a disturbance variable. H/sub /spl infin// optimization theory is suitable to design the waveform controller with disturbance noises of the three-phase converter. The stability and performance requirements for the converter can be expressed in terms of ||/spl middot/|| norm of closed loop transfer and sensitivity functions and appropriate weighting functions, the controller achieves stability and performance robustness in the presence of input voltage sensorless control with H/sub /spl infin// optimal arithmetic. The feasibility and advantage of the control scheme is verified by simulation and experimental results.

Method for constructing data frame in synchronous ethernet(r), data processing method and ethernet(r) device

Abstract: PROBLEM TO BE SOLVED: To provide a method for constructing a data frame with which transmission efficiency can be prevented from being reduced, by performing division into a synchronous frame and an asynchronous frame in a physical hierarchy in a synchronous Ethernet (R) which simultaneously provides a real-time service and a non-real-time service. SOLUTION: The method comprises a first step of confirming whether or not data for transmission are synchronous data; a second step of, when the data are synchronous data, displaying that the data are synchronous data in a preamble of the frame which does not contain a MAC header, and generating a synchronous frame by including the data into a data portion of the frame; and a third step of, when the data are asynchronous data, displaying that the data are asynchronous data in the preamble of the frame containing a MAC header, and generating an asynchronous frame by including the data into a data portion of the frame. COPYRIGHT: (C)2006,JPO&NCIPI

Current regulation of pwm inverter using stationary frame regulator

Abstract: PWM Inverters need an internal current feedback loop to maintain desired current level. The current feedback scheme helps in providing desired current to ac loads connected to the inverter. The performance of the inverter depends largely on the quality of the applied current control strategy. Various current regulation schemes include stationary frame regulators and synchronous frame regulators. The synchronous frame regulator is more complex, as it requires a means of transform ing a measured stationary frame ac current to rotating frame dc quantities, and transforming the resultant control action back to the stationary frame for execution. This information can introduce errors if the synchronous frame identification is not accurate. In this paper, the stationary frame regulator developed for single -phase system using Fuzzy logic controller. Regulation of

Method and device for managing shared transmission medium

Abstract: PROBLEM TO BE SOLVED: To disclose a method and device for managing a shared transmission medium, between a plurality of stations in a wireless local area network having an access point (AP). SOLUTION: The AP transmits to all stations substantially periodic management frames. A Super Frame is defined as the time period between two consecutive management frames. This Super Frame is divided into a plurality of time periods and these time periods correspond to respective access schemes. This time division is performed according to management information comprised in the periodic management frame. There are a first time period corresponding to a contention free access scheme which includes a Time Frame (TF) having at least one synchronous Frame Time Interval (FTI), and a second time period corresponding to a contention access scheme. COPYRIGHT: (C)2005,JPO&NCIPI

Method for constructing and processing a frame in synchronous ethernet

Abstract: Disclosed is a method for constructing a frame of data for transmission by each Ethernet device in a synchronous Ethernet, which comprising the steps of receiving the data for transmission and confirming whether or not the data for transmission are synchronous data, when the received data are synchronous data, marking that the data are synchronous data in a preamble of the frame and constructing a synchronous frame by including the received data into a data portion of the frame which does not contain a MAC header and when the received data are asynchronous data, marking that the data are asynchronous data in the preamble of the frame and constructing an asynchronous frame by including the received data into a data portion of the frame containing a MAC header.

New synchronization method for three-phase PWM rectifiers

Abstract: This paper proposes a new open-loop synchronization method for three-phase pwm rectifiers connected to the utility grid. It presents a better performance if compared with other open-loop methods in the presence of grid voltage unbalance and harmonics. Moreover, it reduces the total harmonic distortion (THD) and it does not require complex algorithms such as phase-locked loop (PLL). Simulation results and abacuses are given to demonstrate the good performance of the proposed method if compared to the well known modified synchronous reference frame method. Simulation results from a three-phase PWM rectifier with deadbeat controller are given to demonstrate the performance of the proposed method.