This tutorial presents an overview of the technological advances in millimeter-wave (mm-wave) circuit components, antennas, and propagation that will soon allow 60-GHz transceivers to provide multigigabit per second (multi-Gb/s) wireless communication data transfers in the consumer marketplace. Our goal is to help engineers understand the convergence of communications, circuits, and antennas, as the emerging world of subterahertz and terahertz wireless communications will require understanding at the intersections of these areas. This paper covers trends and recent accomplishments in a wide range of circuits and systems topics that must be understood to create massively broadband wireless communication systems of the future. In this paper, we present some evolving applications of massively broadband wireless communications, and use tables and graphs to show research progress from the literature on various radio system components, including on-chip and in-package antennas, radio-frequency (RF) power amplifiers (PAs), low-noise amplifiers (LNAs), voltage-controlled oscillators (VCOs), mixers, and analog-to-digital converters (ADCs). We focus primarily on silicon-based technologies, as these provide the best means of implementing very low-cost, highly integrated 60-GHz mm-wave circuits. In addition, the paper illuminates characterization techniques that are required to competently design and fabricate mm-wave devices in silicon, and illustrates effects of the 60-GHz RF propagation channel for both in-building and outdoor use. The paper concludes with an overview of the standardization and commercialization efforts for 60-GHz multi-Gb/s devices, and presents a novel way to compare the data rate versus power efficiency for future broadband devices.

http://faculty.poly.edu/~tsr/wp-content/uploads/publications/abstract17.pdf

State of the Art in 60-GHz Integrated Circuits and Systems for Wireless Communications

Resonance conditions for a substrate-superstrate printed antenna geometry which allow for large antenna gain are presented. Asymptotic formulas for gain, beamwidth, and bandwidth are given, and the bandwidth limitation of the method is discussed. The method is extended to produce narrow patterns about the horizon, and directive patterns at two different angles.

Gain enhancement methods for printed circuit antennas

This article presents a historical review of the research carried out on dielectric resonator antennas (DRAs) over the last three decades. Major research activities in each decade are highlighted. The current state of the art of dielectric-resonator-antenna technology is then reviewed. The achievable performance of dielectric resonator antennas designed for compactness, wide impedance bandwidth, low profiles, circular polarization, or high gain are illustrated. The latest developments in dielectric-resonator-antenna arrays and fabrication techniques are also examined.

Dielectric Resonator Antennas: A Historical Review and the Current State of the Art

Preface. 1. Introduction. 2. Optical Fiber. 3. Photodetectors. 4. Receiver Fundamentals. 5. Transimpledance Amplifiers. 6. Main Amplifiers. 7. Optical Transmitters. 8. Laser and Modulator Drivers. Appendix A: Eye Diagrams. Appendix B: Differential Circuits. Appendix C: S Parameters. Appendix D: Transistors and Technologies. Appendix E: Answers to the Problems. Appendix F: Notation. Appendix G: Symbols. Appendix H: Acronyms. References. Index.

Broadband Circuits for Optical Fiber Communication

A dual-channel 10 Gb/s per channel single-chip optoelectronic transceiver has been demonstrated in a 0.13-mum CMOS SOI technology. The transceiver integrates conventionally discrete optoelectronic functions such as high-speed 10-Gb/s electro-optic modulation and 10-Gb/s optical reception on an SOI substrate using a standard CMOS process. The high optical index contrast between silicon (n=3.5) and its oxide (n=1.5) allows for very large scale integration of optical devices, while the use of a standard CMOS process allows these devices to be seamlessly fabricated together with electronics on the same substrate. Such a high level of optoelectronic integration is unprecedented, and serves to substantially reduce system footprint and power dissipation, allowing efficient scaling to higher data rates and broader functionality. This paper describes the photonic components, electronic blocks, and architecture of a CMOS photonic transceiver that achieves an aggregate data rate of 20Gb/s in a dual-channel package, with a BER of less than 10-15 and a power consumption of 1.25 W per channel with both channels operating simultaneously

A Fully Integrated 4 $\times$ 10-Gb/s DWDM Optoelectronic Transceiver Implemented in a Standard 0.13 $\mu{\hbox {m}}$ CMOS SOI Technology

This paper presents for the first time the design and performance of a novel integrated dielectric resonator antenna fabricated on a high conducting silicon substrate for system on-chip applications. A differential launcher to excite the TE 01delta mode of the high permittivity cylindrical dielectric resonator was fabricated using the IBM SiGeHP5 process. The proposed antenna integrated on a silicon substrate of conductivity 7.41 S/m has an impedance bandwidth of 2725 MHz at 27.78 GHz, while the achieved gain and radiation efficiency are 1 dBi and 45% respectively. The design parameters were optimized employing Ansoft HFSS simulation software. Very good agreement has been observed between simulation and experimental results. The results demonstrate that integration of dielectric resonator antennas on silicon is viable, leading to the fabrication of high efficient RF circuits, ultra miniaturization of ICs and for the possible integration of active devices.

Dielectric Resonator Antenna on Silicon Substrate for System On-Chip Applications

Several new uni-planar coplanar-waveguide-fed slot surface-wave launchers are presented in this paper. The launchers are used to efficiently excite the dominant transverse-magnetic surface-wave mode inside a grounded dielectric slab for possible use in power combiners and other applications. Analysis of the surface waves and optimization of the slab thickness and other needed parameters are presented. Next, the launchers design and optimization using two commercially available software are described. The launchers were fabricated and tested. Good agreement is obtained between the numerical and experimental results.

Uni-planar CPW-fed slot launchers for efficient TM/sub 0/ surface-wave excitation

The problem of optimum excitation of surface waves on a grounded dielectric slab by means of slots in the ground plane is considered. By adopting a two-dimensional (2-D) model, analysis lead to closed forms for the power launched as surface waves and power leaked as radiation. Input admittance of a single slot source and mutual admittance between two slots are derived and utilized to design a three element Yagi array of slots to achieve a prescribed ratio of forward to backward surface wave power. As a development of the 2-D model, we allow finite extent of slot excitation by assuming a Gaussian E-field distribution across the slot. The effect of the Gaussian width on the excited surface wave power is studied. The analysis is relevant to the study of surface waves on printed circuits. Specifically, it applies to the implementation of power combiners based on quasioptical slab beam that have been recently introduced in the literature for use in the millimeter wave band.

Theoretical considerations in the optimization of surface waves on a planar structure

This paper presents the design and performance characteristics of a 20-40 GHz monolithic double-balanced direct conversion mixer implemented using InGaP/GaAs HBT process. The compact MMIC mixer makes use of a Gilbert-cell multiplier and utilizes a broadband monolithic passive balun that has been developed for MMIC applications. The new balun makes use of multidielectric layer structure to achieve a broadband performance in a simple coplanar configuration. A measured return loss better than 15 dB, with a maximum insertion loss of 4.5 dB including the 3-dB power splitting loss has been achieved over the band from 15 to 45 GHz. Operated as a downconverter mixer, the newly developed direct conversion mixer achieves a measured conversion gain of 16 dB given an RF signal at 30 GHz, LO drive of 5 dBm and a downconverted baseband signal at 10 MHz. The mixer IP3 occurs at an output power of 4 dBm while the IP2 occurs at an output power of 11 dBm.

A monolithic double-balanced direct conversion mixer with an integrated wideband passive balun

The authors present two four-stage traveling-wave amplifiers (TWA) fabricated in a 0.18-/spl mu/m CMOS process. A TWA with an internal drain bias network achieved a gain of 5 dB out to 10 GHz, and another TWA without an on-chip bias network achieved a gain of 8 dB out to 10 GHz. These are the highest frequency CMOS TWAs known to the authors.

A.P. Freundorfer

Papers

Dielectric Resonator Antenna on Silicon Substrate for System On-Chip Applications

Uni-planar CPW-fed slot launchers for efficient TM/sub 0/ surface-wave excitation

Theoretical considerations in the optimization of surface waves on a planar structure

A monolithic double-balanced direct conversion mixer with an integrated wideband passive balun

Performance of 1-10-GHz traveling wave amplifiers in 0.18-μm CMOS