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Abirmoya Santra

Researcher at Indian Institute of Technology Madras

Publications -  16
Citations -  151

Abirmoya Santra is an academic researcher from Indian Institute of Technology Madras. The author has contributed to research in topics: Threshold voltage & MOSFET. The author has an hindex of 5, co-authored 16 publications receiving 121 citations. Previous affiliations of Abirmoya Santra include National Institute of Technology, Rourkela.

Papers
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An Analytical Threshold Voltage Model for Triple-Material Cylindrical Gate-All-Around (TM-CGAA) MOSFETs

TL;DR: In this paper, an analytical threshold voltage model is proposed for a triple-material cylindrical gate-all-around MOSFET considering parabolic approximation of the potential along the radial axis.
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An analytical threshold voltage model for a short-channel dual-metal-gate (DMG) recessed-source/drain (Re-S/D) SOI MOSFET

TL;DR: In this paper, an analytical short-channel threshold voltage model is presented for a dual-metal-gate (DMG) fully depleted recessed source/drain (Re-S/D) SOI MOSFET.
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A rigorous simulation based study of gate misalignment effects in gate engineered double-gate (DG) MOSFETs

TL;DR: In this paper, the effects of gate misalignment between the front and the back gate for gate engineered double-gate (DG) MOSFETs were investigated by a numerical simulation based study.
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Analytical subthreshold current and subthreshold swing models of short-channel dual-metal-gate (DMG) fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs

TL;DR: In this article, analytical subthreshold current and sub-threshold swing models are derived for the short-channel dual-metal-gate (DMG) fully-depleted (FD) recessed-source/ drain (Re-S/D) SOI MOSFETs considering that diffusion is the dominant current flow mechanism in sub-reshold regime of the device operation.
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An Analytical Model for the Threshold Voltage of Short-Channel Double-Material-Gate (DMG) MOSFETs with a Strained-Silicon (s-Si) Channel on Silicon-Germanium (SiGe) Substrates

TL;DR: In this article, an analytical threshold voltage model is developed for a short-channel double-material-gate (DMG) strained-silicon (s-Si) on silicon-germanium (Si 1-x Ge x ) MOSFET structure.