Multilevel inverter technology has emerged recently as a very important alternative in the area of high-power medium-voltage energy control. This paper presents the most important topologies like diode-clamped inverter (neutral-point clamped), capacitor-clamped (flying capacitor), and cascaded multicell with separate DC sources. Emerging topologies like asymmetric hybrid cells and soft-switched multilevel inverters are also discussed. This paper also presents the most relevant control and modulation methods developed for this family of converters: multilevel sinusoidal pulsewidth modulation, multilevel selective harmonic elimination, and space-vector modulation. Special attention is dedicated to the latest and more relevant applications of these converters such as laminators, conveyor belts, and unified power-flow controllers. The need of an active front end at the input side for those inverters supplying regenerative loads is also discussed, and the circuit topology options are also presented. Finally, the peripherally developing areas such as high-voltage high-power devices and optical sensors and other opportunities for future development are addressed.

Multilevel inverters: a survey of topologies, controls, and applications

Multilevel converters have been under research and development for more than three decades and have found successful industrial application. However, this is still a technology under development, and many new contributions and new commercial topologies have been reported in the last few years. The aim of this paper is to group and review these recent contributions, in order to establish the current state of the art and trends of the technology, to provide readers with a comprehensive and insightful review of where multilevel converter technology stands and is heading. This paper first presents a brief overview of well-established multilevel converters strongly oriented to their current state in industrial applications to then center the discussion on the new converters that have made their way into the industry. In addition, new promising topologies are discussed. Recent advances made in modulation and control of multilevel converters are also addressed. A great part of this paper is devoted to show nontraditional applications powered by multilevel converters and how multilevel converters are becoming an enabling technology in many industrial sectors. Finally, some future trends and challenges in the further development of this technology are discussed to motivate future contributions that address open problems and explore new possibilities.

/pdf/recent-advances-and-industrial-applications-of-multilevel-26fluutoc9.pdf

Recent Advances and Industrial Applications of Multilevel Converters

This paper reviews the current status and implementation of battery chargers, charging power levels, and infrastructure for plug-in electric vehicles and hybrids. Charger systems are categorized into off-board and on-board types with unidirectional or bidirectional power flow. Unidirectional charging limits hardware requirements and simplifies interconnection issues. Bidirectional charging supports battery energy injection back to the grid. Typical on-board chargers restrict power because of weight, space, and cost constraints. They can be integrated with the electric drive to avoid these problems. The availability of charging infrastructure reduces on-board energy storage requirements and costs. On-board charger systems can be conductive or inductive. An off-board charger can be designed for high charging rates and is less constrained by size and weight. Level 1 (convenience), Level 2 (primary), and Level 3 (fast) power levels are discussed. Future aspects such as roadbed charging are presented. Various power level chargers and infrastructure configurations are presented, compared, and evaluated based on amount of power, charging time and location, cost, equipment, and other factors.

/pdf/review-of-battery-charger-topologies-charging-power-levels-85yy2igx2w.pdf

Review of Battery Charger Topologies, Charging Power Levels, and Infrastructure for Plug-In Electric and Hybrid Vehicles

http://ieeexplore.ieee.org/iel5/5610941/5624686/05624745.pdf

Power electronics

Cascaded multilevel inverters synthesize a medium-voltage output based on a series connection of power cells which use standard low-voltage component configurations. This characteristic allows one to achieve high-quality output voltages and input currents and also outstanding availability due to their intrinsic component redundancy. Due to these features, the cascaded multilevel inverter has been recognized as an important alternative in the medium-voltage inverter market. This paper presents a survey of different topologies, control strategies and modulation techniques used by these inverters. Regenerative and advanced topologies are also discussed. Applications where the mentioned features play a key role are shown. Finally, future developments are addressed.

A Survey on Cascaded Multilevel Inverters

A novel model for low voltage (30 V) MOSFET switching loss calculation is presented in this paper, which takes into account the effect of parasitic Ls and other major parasitics in the loss calculation, giving more insight of the MOSFET switching process Based on this model, high frequency topologies of 12 V VRM (voltage regulator module) can be conveniently analyzed and evaluated from the efficiency point of view

A novel model for MOSFET switching loss calculation

Symmetric blocking power semiconductor switches require positive-bevel edge terminations for the reverse blocking p-n junction. This technique has been extensively applied to silicon wafer-size devices with high current ratings. In this letter, we propose and experimentally demonstrate, for the first time, that an orthogonal positive-bevel termination can be used for the reverse blocking junction of chip-size SiC devices. The edge termination was formed by sawing the SiC wafer with a V-shaped dicing blade. For proof of concept, our experiment was done on a SiC wafer with a 15.8-μm 6.1 × 1015 cm-3 p-type epitaxial layer grown on an N+ substrate. The positive-bevel termination resulted in a breakdown voltage of over 1000 V as limited by reach-through breakdown even without removal of damage from the sawing. The leakage current was found to be reduced by two orders of magnitude after reactive ion etching of the SiC bevel surface to remove the sawing damage.

Orthogonal Positive-Bevel Termination for Chip-Size SiC Reverse Blocking Devices

SiC Intelligent Power Module (IPM) with high bandwidth integrated current sensors is a future trend to improve the device protection capability and chip utilization. In this work, an integrated current sensing scheme for Silicon Carbide (SiC) MOSFET power module using a Si MOSFET current mirror is proposed, analyzed and tested. The use of Si MOSFET not only lowers the overall cost, but compensates the temperature variation as well. The influence of device mismatching on sensing accuracy are discussed. Optimal selection and trade-off of sensing resistor value are calculated. Discrete device circuit and conceptual DBC-based module are tested to verify the scheme's feasibility and performance. The results show good steady state accuracy and high bandwidth performance.

High bandwidth current sensing of SiC MOSFET with a Si current mirror

To achieve higher power density and design flexibility with unlimited phase number, the concept of monolithic/modularized voltage regulator channel (MVRC) is introduced to be a generic power integrated circuit (IC) solution for both central processing unit (CPU) and point-of-load (POL) power management. Novel control architecture and analog circuits are invented to implement the MVRC concept. Tolerance analysis and hardware testing verified that the MVRC approach is suitable for today's and even future's microprocessor power management.

Monolithic/Modularized Voltage Regulator Channel

This paper describes a novel protection method to limit the fault currents caused by short circuit in a voltage source converter (VSC) based DC systems with capacitors connected to the DC bus. Analyzing the development of DC fault current in such DC systems shows that capacitor discharge dominates the very rapid fault current rising at the instance of faults. If this high slope fault current surge is not limited, stored energy in the capacitor will cause hazard to personals as well as connected equipment. If the discharging current from the DC bus capacitor is not limited, it will require much higher break capability of the DC breakers. Therefore a novel protection method is proposed to limit the DC fault currents by detecting and interrupting the DC capacitor discharge using a solid state circuit breaker (capacitor SSCB) which is connected in series with the DC bus capacitor. Implementing this new method will effectively reduce peak value of the fault current, alleviate current stress of diodes in VSC bridges, in a way that only local current information is required. It needs no external control signals, and power loss of this capacitor SSCB is relatively low. Both simulations and tests have proved this method to be effective.

Alex Q. Huang

Papers

A novel model for MOSFET switching loss calculation

Orthogonal Positive-Bevel Termination for Chip-Size SiC Reverse Blocking Devices

High bandwidth current sensing of SiC MOSFET with a Si current mirror

Monolithic/Modularized Voltage Regulator Channel

A protection scheme against DC faults VSC based DC systems with bus capacitors