Showing papers by "Alina Deutsch published in 2006"
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01 Oct 2006TL;DR: A novel high-speed serial signaling scheme that minimizes the distortion for multichip module (MCM) packaging level communication by intentionally adding leakage resistors between the signal trace and the ground is proposed.
Abstract: We propose a novel high-speed serial signaling scheme that minimizes the distortion for multichip module (MCM) packaging level communication by intentionally adding leakage resistors between the signal trace and the ground. The new scheme is inspired by the theory of distortionless transmission line which states that if R/G = L/C, there will be no distortion at the receiver end and the signal propagates at the speed of light. The simulation results indicate that, using the shunt resistor scheme, 10+ Gbps bit rate is achievable over a 10 cm single-ended stripline without pre-emphasis or equalization
7 citations
01 Jan 2006
TL;DR: In this paper, a new technique is described for reducing computational complexity and improving accuracy of combined power distribution and interconnect noise prediction for wide, on-chip data-buses.
Abstract: A new technique is described for reducing computational complexity and improving accuracy of combined power distribution and interconnect noise prediction for wide, on-chip data-buses. The methodology uses lossy transmission-line power-blocks with frequency-dependent properties needed for the multigigahertz clock frequencies. The interaction between delta-I noise, common-mode noise, and crosstalk and their effect on timing is illustrated with simulations using representative driver and receiver circuits and on-chip interconnections.
3 citations
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IBM1
TL;DR: In this article, a new technique is described for reducing computational complexity and improving accuracy of combined power distribution and interconnect noise prediction for wide, on-chip data-buses.
Abstract: A new technique is described for reducing computational complexity and improving accuracy of combined power distribution and interconnect noise prediction for wide, on-chip data-buses. The methodology uses lossy transmission-line power-blocks with frequency-dependent properties needed for the multigigahertz clock frequencies. The interaction between delta-I noise, common-mode noise, and crosstalk and their effect on timing is illustrated with simulations using representative driver and receiver circuits and on-chip interconnections.
3 citations
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09 May 2006TL;DR: In this paper, the authors explore an attenuation measurement technique for PCB traces that is simple, robust, and quick enough to be a viable solution for a printed circuit board production environment.
Abstract: In this paper we explore an attenuation measurement technique for PCB traces that is simple, robust, and quick enough to be a viable solution for a printed circuit board production environment. The technique is based on time domain reflectometry and transmission (TDR/T) measurements of two traces of different length. The result is the trace attenuation with respect to frequency. The technique combines well-known time and frequency domain algorithms. Comparison of experimental data to alternative time and frequency domain approaches verify the proposed technique up to 15 GHz. The importance of a low reflection signal launch design is discussed.