H
Howard H. Smith
Researcher at IBM
Publications - 76
Citations - 1701
Howard H. Smith is an academic researcher from IBM. The author has contributed to research in topics: Chip & Noise. The author has an hindex of 20, co-authored 76 publications receiving 1678 citations.
Papers
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Journal ArticleDOI
When are transmission-line effects important for on-chip interconnections?
Alina Deutsch,Gerard V. Kopcsay,Phillip J. Restle,Howard H. Smith,George A. Katopis,Wiren D. Becker,Paul W. Coteus,C.W. Surovic,Barry J. Rubin,R.P. Dunne,T. Gallo,Keith A. Jenkins,L.M. Terman,Robert H. Dennard,George Anthony Sai-Halasz,Byron L. Krauter,D.R. Knebel +16 more
TL;DR: In this paper, the authors analyzed short, medium, and long on-chip interconnections having linewidths of 0.45-52 /spl mu/m in a five-metal-layer structure.
Journal ArticleDOI
On-chip wiring design challenges for gigahertz operation
Alina Deutsch,Paul W. Coteus,G.V. Kopcsay,Howard H. Smith,C.W. Surovic,Byron L. Krauter,Daniel C. Edelstein,P.L. Restle +7 more
TL;DR: This paper reviews the status of present day on-chip wiring design methodologies and understanding and design guidelines are given for using modeling and simulation techniques that have been previously used for package interconnections to teach designers how to make better use of available technologies.
Journal ArticleDOI
Modeling, simulation, and measurement of mid-frequency simultaneous switching noise in computer systems
Wiren D. Becker,James P. Eckhardt,R.W. Frech,George A. Katopis,Erich Klink,Michael F. McAllister,Timothy G. McNamara,Paul D. Muench,S.R. Richter,Howard H. Smith +9 more
TL;DR: In this article, the design of IBM's S/390 computer for control of mid-frequency noise is discussed, where the power distribution and decoupling capacitors must supply that current without disturbing the voltage level at the circuits.
Proceedings ArticleDOI
When are transmission-line effects important for on-chip interconnections
Alina Deutsch,G.V. Kopcsay,Phillip J. Restle,George A. Katopis,Wiren D. Becker,Howard H. Smith,Paul W. Coteus,C.W. Surovic,Barry J. Rubin,R.P. Dunne,T. Gallo,Keith A. Jenkins,L.M. Terman,Robert H. Dennard,George Anthony Sai-Halasz,D.R. Knebel +15 more
TL;DR: In this article, the authors analyzed short, medium and long on-chip interconnections having line widths of 0.45-52 /spl mu/m in a five-metal-layer structure and proposed design guidelines and technology changes to achieve minimum delay and contain crosstalk for local and global wiring.
Journal ArticleDOI
Chip integration methodology for the IBM S/390 G5 and G6 custom microprocessors
Robert M. Averill,K. G. Barkley Iii,Michael Alexander Bowen,Peter J. Camporese,Allan H. Dansky,R. F. Hatch,Dale Eugene Hoffman,M. Mayo,S. A. McCabe,Timothy G. McNamara,T. J. McPherson,Gregory A. Northrop,L. Sigal,Howard H. Smith,David A. Webber,Patrick M. Williams +15 more