Brian J. Greene

TL;DR: In this article, the authors present an FET with a straining structure that is configured to impart a temperature-dependent amount of a pre-selected strain type on the channel region.

TL;DR: In this article, a method for forming a semiconductor structure comprising different species of silicide or germanide positioned in different regions of the semiconductor structures was proposed, by utilizing combination of continuous accumulation of different metals and pattern formation.

TL;DR: In this paper, the authors proposed a structure including an independent stress-producing dielectric element that entirely underlies the bottom surface of an active semiconductor region in which a source, a drain and a channel region of the PFET are disposed.

TL;DR: In this article, the authors proposed a transistor having a dielectric stressor for applying in-plane shear stress, where a chip is provided which includes an active semiconductor region and a field effect transistor ("FET") having a channel region, a source region, and a drain region all arranged within the active semiconductors region.

TL;DR: In this article, a method of making a semiconductor device includes disposing a mask on a substrate, etching the mask to form an opening in the mask; etching a trench in the substrate beneath the opening in mask; and implanting a dopant in an area of the substrate, the dopant capable of gettering mobile ions that can contaminate the substrate.