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Charles J. Alpert
Researcher at IBM
Publications - 224
Citations - 8576
Charles J. Alpert is an academic researcher from IBM. The author has contributed to research in topics: Routing (electronic design automation) & Timing closure. The author has an hindex of 49, co-authored 224 publications receiving 8287 citations. Previous affiliations of Charles J. Alpert include Cadence Design Systems & University of Minnesota.
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Patent
Timing driven routing in integrated circuit design
TL;DR: In this paper, a method, system, and computer program product for timing driven routing in a design of an integrated circuit (IC) are provided in the illustrative embodiments; a router application executing in a data processing system performs a pre-global routing optimization of the design.
Performance-Driven Routing Tree Design
TL;DR: New and efficient interconnection tree constructions that smoothly combine the minimum cost and the minimum radius objectives are given, by combining respectively optimnl algorithms due to Prim and Dijkstra.
Patent
Direct current circuit analysis based clock network design
Charles J. Alpert,Joseph N. Kozhaya,Zhuo Li,Joseph J. Palumbo,Haifeng Qian,Phillip J. Restle,Chin Ngai Sze,Ying Zhou +7 more
TL;DR: In this paper, a design tool with a direct current (DC) transformation analysis unit determines combinations of candidate sink locations for sector buffers within a sector of a clock network design, where the results of the DC circuit analysis include a variance of voltage at nodes of the sector and a maximum value of current from currents flowing between pairs of the nodes in the sector.
Patent
Method for diffusion based cell placement migration
TL;DR: In this article, a method for cell placement in an integrated circuit design that uses a calculated diffusion velocity determined from a density value in order to relocate the cells until the cell placement reduces the density below a predetermined threshold is presented.
Patent
Method and system for extending delay and slew metrics to ramp inputs
TL;DR: In this paper, the authors proposed a method of determining a circuit response (such as delay or slew) from a ramp input of an RC circuit calculates two circuit response parameters using a given circuit response metric based on a step input for the RC circuit, and extends the circuit response metrics to a ramp-input RC circuit by combining the first and second circuit response parameter to yield an estimated ramp response.