Laser contact openings for local poly-Si-metal contacts enabling 26.1%-efficient POLO-IBC solar cells

The global photovoltaic (PV) market is dominated by crystalline silicon (c-Si) based technologies with heavily doped, directly metallized contacts. Recombination of photo-generated electrons and holes at the contact regions is increasingly constraining the power conversion efficiencies of these devices as other performance-limiting energy losses are overcome. To move forward, c-Si PV technologies must implement alternative contacting approaches. Passivating contacts, which incorporate thin films within the contact structure that simultaneously supress recombination and promote charge-carrier selectivity, are a promising next step for the mainstream c-Si PV industry. In this work, we review the fundamental physical processes governing contact formation in c-Si. In doing so we identify the role passivating contacts play in increasing c-Si solar cell efficiencies beyond the limitations imposed by heavy doping and direct metallization. Strategies towards the implementation of passivating contacts in industrial environments are discussed. The development of passivating contacts holds great potential for enhancing the power conversion efficiency of silicon photovoltaics. Here, De Wolf et al. review recent advances in material design and device architecture, and discuss technical challenges to industrial fabrication.

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Passivating contacts for crystalline silicon solar cells

To further increase the conversion efficiency of crystalline silicon (c-Si) solar cells, it is vital to reduce the recombination losses associated with the contacts. Therefore, a contact structure that simultaneously passivates the c-Si surface while selectively extracting only one type of charge carrier (i.e., either electrons or holes) is desired. Realizing such passivating contacts in c-Si solar cells has become an important research objective, and an overview and classification of work to date on this topic is presented here. Using this overview, we discuss the design guidelines for passivating contacts and outline their prospects.

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Passivating Contacts for Crystalline Silicon Solar Cells: From Concepts and Materials to Prospects

Silicon dominates the photovoltaic industry but the conversion efficiency of silicon single-junction solar cells is intrinsically constrained to 29.4%, and practically limited to around 27%. It is possible to overcome this limit by combining silicon with high-bandgap materials, such as III–V semiconductors, in a multi-junction device. Significant challenges associated with this material combination have hindered the development of highly efficient III–V/Si solar cells. Here, we demonstrate a III–V/Si cell reaching similar performances to standard III–V/Ge triple-junction solar cells. This device is fabricated using wafer bonding to permanently join a GaInP/GaAs top cell with a silicon bottom cell. The key issues of III–V/Si interface recombination and silicon's weak absorption are addressed using poly-silicon/SiOx passivating contacts and a novel rear-side diffraction grating for the silicon bottom cell. With these combined features, we demonstrate a two-terminal GaInP/GaAs//Si solar cell reaching a 1-sun AM1.5G conversion efficiency of 33.3%. As silicon solar cells are reaching their optimal efficiencies, below 30%, multi-junctions are being developed to increase the electrical power output over the same area. Here, Cariou et al. use wafer-bonding to fabricate two-terminal silicon III–V tandem cells that reach efficiencies above 33%.

III–V-on-silicon solar cells reaching 33% photoconversion efficiency in two-terminal configuration

Surface passivation of crystalline silicon solar cells: Present and future

Working principle of carrier selective poly-Si/c-Si junctions: Is tunnelling the whole story?

Parasitic Absorption in Polycrystalline Si-layers for Carrier-selective Front Junctions

In the pursuit of ever higher conversion efficiencies for silicon photovoltaic cells, polycrystalline silicon (poly-Si) layers on thin silicon oxide films were shown to form excellent carrier-selective junctions on crystalline silicon substrates. Investigating the pinhole formation that is induced in the thermal processing of the poly-Si on oxide (POLO) junctions is essential for optimizing their electronic performance. We observe the pinholes in the oxide layer by selective etching of the underlying crystalline silicon. The originally nm-sized pinholes are thus readily detected using simple optical and scanning electron microscopy. The resulting pinhole densities are in the range of 6.6 × 106 cm−2 to 1.6 × 108 cm−2 for POLO junctions with selectivities close to S10 = 16, i.e., saturation current density J0c below 10 fA/cm2 and contact resistivity ρc below 10 mΩcm2. The measured pinhole densities agree with values deduced by a pinhole-mediated current transport model. Thus, we conclude pinhole-mediated current transport to be the dominating transport mechanism in the POLO junctions investigated here.

Pinhole density and contact resistivity of carrier selective junctions with polycrystalline silicon on oxide

We investigate the passivation quality of hole-collecting junctions consisting of thermally or wet-chemically grown interfacial oxides, sandwiched between a monocrystalline-Si substrate and a p-type polycrystalline-silicon (Si) layer. The three different approaches for polycrystalline-Si preparation are compared: the plasma-enhanced chemical vapor deposition (PECVD) of in situ p+-type boron-doped amorphous Si layers, the low pressure chemical vapor deposition (LPCVD) of in situ p+-type B-doped polycrystalline Si layers, and the LPCVD of intrinsic amorphous Si, subsequently ion-implanted with boron. We observe the lowest J0e values of 3.8 fA cm−2 on thermally grown interfacial oxide on planar surfaces for the case of intrinsic amorphous Si deposited by LPCVD and subsequently implanted with boron. Also, we obtain a similar high passivation of p+-type poly-Si junctions on wet-chemically grown oxides as well as for all the investigated polycrystalline-Si deposition approaches. Conversely, on alkaline-textured surfaces, J0e is at least 4 times higher compared to planar surfaces. This finding holds for all the junction preparation methods investigated. We show that the higher J0e on textured surfaces can be attributed to a poorer passivation of the p+ poly/c-Si stacks on (111) when compared to (100) surfaces.

D. Tetzlaff

Papers

Working principle of carrier selective poly-Si/c-Si junctions: Is tunnelling the whole story?

Parasitic Absorption in Polycrystalline Si-layers for Carrier-selective Front Junctions

Pinhole density and contact resistivity of carrier selective junctions with polycrystalline silicon on oxide

On the recombination behavior of p+‐type polysilicon on oxide junctions deposited by different methods on textured and planar surfaces

Implementation of n+ and p+ Poly Junctions on Front and Rear Side of Double-Side Contacted Industrial Silicon Solar Cells