von Neumann architecture based computers isolate computation and storage (i.e. data is shuttled between computation blocks (processor) and memory blocks). The to-and-fro movement of data leads to a fundamental limitation of modern computers, known as the Memory wall. Logic in-Memory (LIM)/In-Memory Computing (IMC) approaches aim to address this bottleneck by directly computing inside memory units thereby eliminating energy-intensive and time-consuming data movement. Several recent works in literature, propose realization of logic function(s) directly using arrays of emerging resistive memory devices (example- memristors, RRAM/ReRAM, PCM, CBRAM, OxRAM, STT-MRAM etc.), rather than using conventional transistors for computing. The logic/embedded-side of digital systems (like processors, micro-controllers) can greatly benefit from such LIM realizations. However, the pure storage-side of digital systems (example SSDs, enterprise storage etc.) will not benefit much from such LIM approaches as when memory arrays are used for logic they lose their core functionality of storage. Thus, there is the need for an approach complementary to existing LIM techniques, that's more beneficial for the storage-side of digital systems; one that gives compute capability to memory arrays not at the cost of their existing stored states. Fundamentally, this would require memory nanodevice arrays that are capable of storing and computing simultaneously. In this paper, we propose a novel 'Simultaneous Logic in-Memory' (SLIM) methodology which is complementary to existing LIM approaches in literature. Through extensive experiments we demonstrate novel SLIM bitcells (1T-1R/2T-1R) comprising non-filamentary bilayer analog OxRAM devices with NMOS transistors. Proposed bitcells are capable of implementing both Memory and Logic operations simultaneously. Detailed programming scheme, array level implementation, and controller architecture are also proposed. Furthermore, to study the impact of proposed SLIM approach for real-world implementations, we performed analysis for two applications: (i) Sobel Edge Detection, and (ii) Binary Neural Network- Multi layer Perceptron (BNN-MLP). By performing all computations in SLIM bitcell array, huge Energy Delay Product (EDP) savings of ≈75× for 1T-1R (≈40× for 2T-1R) SLIM bitcell were observed for edge-detection application while EDP savings of ≈3.5× for 1T-1R (≈1.6× for 2T-1R) SLIM bitcell were observed for BNN-MLP application respectively, in comparison to conventional computing. EDP savings owing to reduction in data transfer between CPU ↔ memory is observed to be ≈780× (for both SLIM bitcells).

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SLIM: Simultaneous Logic-in-Memory Computing Exploiting Bilayer Analog OxRAM Devices.

Von Neumann architecture based computers isolate/physically separate computation and storage units i.e. data is shuttled between computation unit (processor) and memory unit to realize logic/ arithmetic and storage functions. This to-and-fro movement of data leads to a fundamental limitation of modern computers, known as the memory wall. Logic in-Memory (LIM) approaches aim to address this bottleneck by computing inside the memory units and thereby eliminating the energy-intensive and time-consuming data movement. However, most LIM approaches reported in literature are not truly "simultaneous" as during LIM operation the bitcell can be used only as a Memory cell or only as a Logic cell. The bitcell is not capable of storing both the Memory/Logic outputs simultaneously. Here, we propose a novel 'Simultaneous Logic in-Memory' (SLIM) methodology that allows to implement both Memory and Logic operations simultaneously on the same bitcell in a non-destructive manner without losing the previously stored Memory state. Through extensive experiments we demonstrate the SLIM methodology using non-filamentary bilayer analog OxRAM devices with NMOS transistors (2T-1R bitcell). Detailed programming scheme, array level implementation and controller architecture are also proposed. Furthermore, to study the impact of introducing SLIM array in the memory hierarchy, a simple image processing application (edge detection) is also investigated. It has been estimated that by performing all computations inside the SLIM array, the total Energy Delay Product (EDP) reduces by ~ 40x in comparison to a modern-day computer. EDP saving owing to reduction in data transfer between CPU Memory is observed to be ~ 780x.

SLIM: Simultaneous Logic-in-Memory Computing Exploiting Bilayer Analog OxRAM Devices

In this manuscript, recent progress in the area of resistive random access memory (RRAM) technology which is considered one of the most standout emerging memory technologies owing to its high speed, low cost, enhanced storage density, potential applications in various fields, and excellent scalability is comprehensively reviewed. First, a brief overview of the field of emerging memory technologies is provided. The material properties, resistance switching mechanism, and electrical characteristics of RRAM are discussed. Also, various issues such as endurance, retention, uniformity, and the effect of operating temperature and random telegraph noise (RTN) are elaborated. A discussion on multilevel cell (MLC) storage capability of RRAM, which is attractive for achieving increased storage density and low cost is presented. Different operation schemes to achieve reliable MLC operation along with their physical mechanisms have been provided. In addition, an elaborate description of switching methodologies and current voltage relationships for various popular RRAM models is covered in this work. The prospective applications of RRAM to various fields such as security, neuromorphic computing, and non-volatile logic systems are addressed briefly. The present review article concludes with the discussion on the challenges and future prospects of the RRAM.

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Resistive Random Access Memory (RRAM): an Overview of Materials, Switching Mechanism, Performance, Multilevel Cell (mlc) Storage, Modeling, and Applications

Resistive random access memory (RRAM) devices are receiving increasing extensive attention due to their enhanced properties such as fast operation speed, simple device structure, low power consumption, good scalability potential and so on, and are currently considered to be one of the next-generation alternatives to traditional memory. In this review, an overview of RRAM devices is demonstrated in terms of thin film materials investigation on electrode and function layer, switching mechanisms and artificial intelligence applications. Compared with the well-developed application of inorganic thin film materials (oxides, solid electrolyte and two-dimensional (2D) materials) in RRAM devices, organic thin film materials (biological and polymer materials) application is considered to be the candidate with significant potential. The performance of RRAM devices is closely related to the investigation of switching mechanisms in this review, including thermal-chemical mechanism (TCM), valance change mechanism (VCM) and electrochemical metallization (ECM). Finally, the bionic synaptic application of RRAM devices is under intensive consideration, its main characteristics such as potentiation/depression response, short-/long-term plasticity (STP/LTP), transition from short-term memory to long-term memory (STM to LTM) and spike-time-dependent plasticity (STDP) reveal the great potential of RRAM devices in the field of neuromorphic application.

https://www.mdpi.com/2079-4991/10/8/1437/pdf

Advances of RRAM Devices: Resistive Switching Mechanisms, Materials and Bionic Synaptic Application.

Brain-inspired neuromorphic computing has been intensively studied due to its potential to address the inherent energy and throughput limitations of conventional Von-Neumann based computing architecture. Memristors are ideal building blocks for artificial synapses, which are the fundamental components of neuromorphic computing. In recent years, the emerging ferroic (ferroelectric and ferromagnetic) tunnel junctions have been shown to be able to function as memristors, which are potential candidates to emulate artificial synapses for neuromorphic computing. Here, we provide a review on the ferroic tunnel junctions and their applications as artificial synapses in neuromorphic networks. We focus on the development history of ferroic tunnel junctions, their physical conduction mechanisms, and the intrinsic dynamics of memristors. Their current applications in neuromorphic networks will also be discussed. Finally, a conclusion and future outlooks on the development of ferroic tunnel junctions will be given. Our goal is to give a broad review of ferroic tunnel junction based artificial synapses that can be applied to neuromorphic computing and to help further ongoing research in this field.

Ferroic tunnel junctions and their application in neuromorphic networks

In this review, a comprehensive survey of different oxide-based resistive random-access memories (RRAMs) for neuromorphic computing is provided. We begin with the history of RRAM development, physical mechanism of conduction, fundamental of neuromorphic computing, followed by a review of a variety of RRAM oxide materials (PCMO, HfOx, TaOx, TiOx, NiOx, etc.) with a focus on their application for neuromorphic computing. Our goal is to give a broad review of oxide-based RRAM materials that can be adapted to neuromorphic computing and to help further ongoing research in the field.

Oxide-based RRAM materials for neuromorphic computing

A gradual electroforming process was implemented on the pristine Pt/HfOx/Cu/Pt structure to realize volatile threshold switching characteristics of a diffusive memristor. The reported devices exhib...

Unidirectional Threshold Switching Induced by Cu Migration with High Selectivity and Ultralow OFF Current under Gradual Electroforming Treatment

Resistive random-access memory (RRAM) is promising for various low-power applications, including Internet of Things (IOTs), neuromorphic and data-centric computing. However, the poor reliability, mainly the variability in switching, is one of the biggest challenges for RRAM. Here, a novel geometry of electrochemical metallization memory (ECM)-based RRAM is proposed with lower switching voltage and less switching variability. From COMSOL Multiphysics simulation, the intensity and distribution of electric field can be tuned by design of RRAM geometry in C-shape. It is anticipated that a higher and more refined electric field can improve the RRAM variability. This hypothesis is validated with experiment on forming-free ECM-based RRAM in C-shape and traditional square-shape, where around 36% less set voltage and 32% less set variation observed for as-designed C-shaped RRAM.

https://iopscience.iop.org/article/10.1088/1361-6463/aac2b4/pdf

A novel geometry of ECM-based RRAM with improved variability

We report hopping conduction in Pt/MgO/Cu resistive switching memory (RSM) devices predominantly in the low resistance state. Current-voltage measurements of Pt/MgO/Cu RSM devices exhibited good cycle-to-cycle variability. Promising DC endurance exceeding 2000 cycles and retention exceeding 10 years at 125°C were obtained at 103-104ON/OFF ratio within a consistent range of SET and RSET voltages. Multi-level state properties were also exhibited, while TEM and EDX studies suggested the possibility of filament in Pt/MgO/Cu RSM devices.

Hopping Conduction Temperature Investigations on High Retention Electrochemical Metallization MgO-based Resistive Switching Devices in the Low Resistance State

A multi-level state HfO 2 -based resistive switching model is reported, where the increase in stopping voltage (V stop ) and thus activation energy (E AC ) is attributed to the depletion of oxygen vacancy (V o ) concentration (n c ) during reset. Hopping conduction fittings also indicated a depletion of n c due to an increase of V stop as shown by an increase of trap-to-trap distance (a) and trap energy (ϕ T ).

Desmond Jia Jun Loy

Papers

Oxide-based RRAM materials for neuromorphic computing

Unidirectional Threshold Switching Induced by Cu Migration with High Selectivity and Ultralow OFF Current under Gradual Electroforming Treatment

A novel geometry of ECM-based RRAM with improved variability

Hopping Conduction Temperature Investigations on High Retention Electrochemical Metallization MgO-based Resistive Switching Devices in the Low Resistance State

Impact of Stopping Voltage and Hopping Conduction on the Oxygen Vacancy Concentration of Multi-Level HfO 2 -Based Resistive Switching Devices