von Neumann architecture based computers isolate computation and storage (i.e. data is shuttled between computation blocks (processor) and memory blocks). The to-and-fro movement of data leads to a fundamental limitation of modern computers, known as the Memory wall. Logic in-Memory (LIM)/In-Memory Computing (IMC) approaches aim to address this bottleneck by directly computing inside memory units thereby eliminating energy-intensive and time-consuming data movement. Several recent works in literature, propose realization of logic function(s) directly using arrays of emerging resistive memory devices (example- memristors, RRAM/ReRAM, PCM, CBRAM, OxRAM, STT-MRAM etc.), rather than using conventional transistors for computing. The logic/embedded-side of digital systems (like processors, micro-controllers) can greatly benefit from such LIM realizations. However, the pure storage-side of digital systems (example SSDs, enterprise storage etc.) will not benefit much from such LIM approaches as when memory arrays are used for logic they lose their core functionality of storage. Thus, there is the need for an approach complementary to existing LIM techniques, that's more beneficial for the storage-side of digital systems; one that gives compute capability to memory arrays not at the cost of their existing stored states. Fundamentally, this would require memory nanodevice arrays that are capable of storing and computing simultaneously. In this paper, we propose a novel 'Simultaneous Logic in-Memory' (SLIM) methodology which is complementary to existing LIM approaches in literature. Through extensive experiments we demonstrate novel SLIM bitcells (1T-1R/2T-1R) comprising non-filamentary bilayer analog OxRAM devices with NMOS transistors. Proposed bitcells are capable of implementing both Memory and Logic operations simultaneously. Detailed programming scheme, array level implementation, and controller architecture are also proposed. Furthermore, to study the impact of proposed SLIM approach for real-world implementations, we performed analysis for two applications: (i) Sobel Edge Detection, and (ii) Binary Neural Network- Multi layer Perceptron (BNN-MLP). By performing all computations in SLIM bitcell array, huge Energy Delay Product (EDP) savings of ≈75× for 1T-1R (≈40× for 2T-1R) SLIM bitcell were observed for edge-detection application while EDP savings of ≈3.5× for 1T-1R (≈1.6× for 2T-1R) SLIM bitcell were observed for BNN-MLP application respectively, in comparison to conventional computing. EDP savings owing to reduction in data transfer between CPU ↔ memory is observed to be ≈780× (for both SLIM bitcells).

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SLIM: Simultaneous Logic-in-Memory Computing Exploiting Bilayer Analog OxRAM Devices.

Von Neumann architecture based computers isolate/physically separate computation and storage units i.e. data is shuttled between computation unit (processor) and memory unit to realize logic/ arithmetic and storage functions. This to-and-fro movement of data leads to a fundamental limitation of modern computers, known as the memory wall. Logic in-Memory (LIM) approaches aim to address this bottleneck by computing inside the memory units and thereby eliminating the energy-intensive and time-consuming data movement. However, most LIM approaches reported in literature are not truly "simultaneous" as during LIM operation the bitcell can be used only as a Memory cell or only as a Logic cell. The bitcell is not capable of storing both the Memory/Logic outputs simultaneously. Here, we propose a novel 'Simultaneous Logic in-Memory' (SLIM) methodology that allows to implement both Memory and Logic operations simultaneously on the same bitcell in a non-destructive manner without losing the previously stored Memory state. Through extensive experiments we demonstrate the SLIM methodology using non-filamentary bilayer analog OxRAM devices with NMOS transistors (2T-1R bitcell). Detailed programming scheme, array level implementation and controller architecture are also proposed. Furthermore, to study the impact of introducing SLIM array in the memory hierarchy, a simple image processing application (edge detection) is also investigated. It has been estimated that by performing all computations inside the SLIM array, the total Energy Delay Product (EDP) reduces by ~ 40x in comparison to a modern-day computer. EDP saving owing to reduction in data transfer between CPU Memory is observed to be ~ 780x.

SLIM: Simultaneous Logic-in-Memory Computing Exploiting Bilayer Analog OxRAM Devices

In this manuscript, recent progress in the area of resistive random access memory (RRAM) technology which is considered one of the most standout emerging memory technologies owing to its high speed, low cost, enhanced storage density, potential applications in various fields, and excellent scalability is comprehensively reviewed. First, a brief overview of the field of emerging memory technologies is provided. The material properties, resistance switching mechanism, and electrical characteristics of RRAM are discussed. Also, various issues such as endurance, retention, uniformity, and the effect of operating temperature and random telegraph noise (RTN) are elaborated. A discussion on multilevel cell (MLC) storage capability of RRAM, which is attractive for achieving increased storage density and low cost is presented. Different operation schemes to achieve reliable MLC operation along with their physical mechanisms have been provided. In addition, an elaborate description of switching methodologies and current voltage relationships for various popular RRAM models is covered in this work. The prospective applications of RRAM to various fields such as security, neuromorphic computing, and non-volatile logic systems are addressed briefly. The present review article concludes with the discussion on the challenges and future prospects of the RRAM.

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Resistive Random Access Memory (RRAM): an Overview of Materials, Switching Mechanism, Performance, Multilevel Cell (mlc) Storage, Modeling, and Applications

PURPOSE: A resistive random access memory device is provided to prevent sneak path problem by using a thin film structure which directly connects a bi-directional switching layer on a resistance change layer. CONSTITUTION: A first electrode(10) is formed on a thin film layer(20). The thin film layer includes a resistance change layer and a switching layer which are connected with each other. The resistance change layer includes materials with bipolar resistance switching characteristics. The switching layer includes materials with bi-directional switching characteristics. The thin film layer is formed on a second electrode(30).

Resistance random access memory

Resistive random access memory (RRAM) devices are receiving increasing extensive attention due to their enhanced properties such as fast operation speed, simple device structure, low power consumption, good scalability potential and so on, and are currently considered to be one of the next-generation alternatives to traditional memory. In this review, an overview of RRAM devices is demonstrated in terms of thin film materials investigation on electrode and function layer, switching mechanisms and artificial intelligence applications. Compared with the well-developed application of inorganic thin film materials (oxides, solid electrolyte and two-dimensional (2D) materials) in RRAM devices, organic thin film materials (biological and polymer materials) application is considered to be the candidate with significant potential. The performance of RRAM devices is closely related to the investigation of switching mechanisms in this review, including thermal-chemical mechanism (TCM), valance change mechanism (VCM) and electrochemical metallization (ECM). Finally, the bionic synaptic application of RRAM devices is under intensive consideration, its main characteristics such as potentiation/depression response, short-/long-term plasticity (STP/LTP), transition from short-term memory to long-term memory (STM to LTM) and spike-time-dependent plasticity (STDP) reveal the great potential of RRAM devices in the field of neuromorphic application.

https://www.mdpi.com/2079-4991/10/8/1437/pdf

Advances of RRAM Devices: Resistive Switching Mechanisms, Materials and Bionic Synaptic Application.

In this review, a comprehensive survey of different oxide-based resistive random-access memories (RRAMs) for neuromorphic computing is provided. We begin with the history of RRAM development, physical mechanism of conduction, fundamental of neuromorphic computing, followed by a review of a variety of RRAM oxide materials (PCMO, HfOx, TaOx, TiOx, NiOx, etc.) with a focus on their application for neuromorphic computing. Our goal is to give a broad review of oxide-based RRAM materials that can be adapted to neuromorphic computing and to help further ongoing research in the field.

Oxide-based RRAM materials for neuromorphic computing

We report on the conduction mechanisms of novel Ru/MgO/Cu and Ru/MgO/Ta resistive switching memory (RSM) devices. Current-voltage (I–V) measurements revealed Schottky emission (SE) as the dominant conduction mechanism in the high resistance state (HRS), which was validated by varying temperatures and transmission electron microscopy (TEM) results. Retention of more than 10 years at 85 °C was obtained for both Ru/MgO/Ta and Ru/MgO/Cu RSM devices. In addition, annealing processes greatly improved the consistency of HRS and LRS switching paths from cycle to cycle, exhibiting an average ON/OFF ratio of 102. Further TEM studies also highlighted the difference in crystallinity between different materials in Ru/MgO/Cu RSM devices, confirming Cu filament identification which was found to be 10 nm in width.

Conduction Mechanisms on High Retention Annealed MgO-based Resistive Switching Memory Devices.

We report a switching model that directly explains the change in activation energy (EAC) at different RESET stop voltages (Vstop) in HfO2-based resistive random access memory devices. The dependenc...

Oxygen Vacancy Density Dependence with a Hopping Conduction Mechanism in Multilevel Switching Behavior of HfO2-Based Resistive Random Access Memory Devices

A gradual electroforming process was implemented on the pristine Pt/HfOx/Cu/Pt structure to realize volatile threshold switching characteristics of a diffusive memristor. The reported devices exhib...

Unidirectional Threshold Switching Induced by Cu Migration with High Selectivity and Ultralow OFF Current under Gradual Electroforming Treatment

In this work, we explore the use of the resistive random access memory (RRAM) device as a synapse for mimicking the trained weights linking neurons in a deep learning neural network (DNN) (AlexNet). The RRAM devices were fabricated in-house and subjected to 1000 bipolar read-write cycles to measure the resistances recorded for Logic-0 and Logic-1 (we demonstrate the feasibility of achieving eight discrete resistance states in the same device depending on the RESET stop voltage). DNN simulations have been performed to compare the relative error between the output of AlexNet Layer 1 (Convolution) implemented with the standard backpropagation (BP) algorithm trained weights versus the weights that are encoded using the measured resistance distributions from RRAM. The IMAGENET dataset is used for classification purpose here. We focus only on the Layer 1 weights in the AlexNet framework with 11 × 11 × 96 filters values coded into a binary floating point and substituted with the RRAM resistance values corresponding to Logic-0 and Logic-1. The impact of variability in the resistance states of RRAM for the low and high resistance states on the accuracy of image classification is studied by formulating a look-up table (LUT) for the RRAM (from measured I-V data) and comparing the convolution computation output of AlexNet Layer 1 with the standard outputs from the BP-based pre-trained weights. This is one of the first studies dedicated to exploring the impact of RRAM device resistance variability on the prediction accuracy of a convolutional neural network (CNN) on an AlexNet platform through a framework that requires limited actual device switching test data.

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Putu Andhita Dananjaya

Papers

Oxide-based RRAM materials for neuromorphic computing

Conduction Mechanisms on High Retention Annealed MgO-based Resistive Switching Memory Devices.

Oxygen Vacancy Density Dependence with a Hopping Conduction Mechanism in Multilevel Switching Behavior of HfO2-Based Resistive Random Access Memory Devices

Unidirectional Threshold Switching Induced by Cu Migration with High Selectivity and Ultralow OFF Current under Gradual Electroforming Treatment

Exploring the Impact of Variability in Resistance Distributions of RRAM on the Prediction Accuracy of Deep Learning Neural Networks