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G. C. Qiao

Researcher at University of Electronic Science and Technology of China

Publications -  14
Citations -  238

G. C. Qiao is an academic researcher from University of Electronic Science and Technology of China. The author has contributed to research in topics: Computer science & Spiking neural network. The author has an hindex of 3, co-authored 5 publications receiving 157 citations.

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Collaborative Task Offloading in Vehicular Edge Multi-Access Networks

TL;DR: This article introduces a vehicular edge multi-access network that treats vehicles as edge computation resources to construct the cooperative and distributed computing architecture and proposes a collaborative task offloading and output transmission mechanism to guarantee low latency as well as the application- level performance.
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Joint Deployment and Mobility Management of Energy Harvesting Small Cells in Heterogeneous Networks

TL;DR: This paper proposes a low-complex algorithm that decouples the joint optimization into the location updating approach and the association matching approach and shows that the proposed schemes can efficiently solve the target problems while striking a better overall system utility, compared with other traditional deployment and management strategies.
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A neuromorphic-hardware oriented bio-plausible online-learning spiking neural network model

TL;DR: A bio-plausible online-learning spiking neural network (SNN) model for hardware implementation that reduces the hardware resources and power consumption by 40.7% and 36.3%, respectively (under 55-nm CMOS process).
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A memristor-based transient chaotic neural network model and its application

TL;DR: The HP Memristor is introduced to a TCNN to develop a memristor-based transient chaotic neural network (MTCNN) model that is highly efficient, converges quickly, and has significant prospects for physical implementation.
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A versatile neuromorphic system based on simple neuron model

TL;DR: A compact, programmable, versatile, and scalable neuromorphic architecture that effectively alleviates the hardware explosion in fully-connected architecture and effectively realizes different convolution operations which are basic computing operations in convolutional neural networks.