A lithographic apparatus configured to project a patterned beam of radiation onto a target portion of a substrate is disclosed. The apparatus includes a first radiation dose detector and a second radiation dose detector, each detector comprising a secondary electron emission surface configured to receive a radiation flux and to emit secondary electrons due to the receipt of the radiation flux, the first radiation dose detector located upstream with respect to the second radiation dose detector viewed with respect to a direction of radiation transmission, and a meter, connected to each detector, to detect a current or voltage resulting from the secondary electron emission from the respective electron emission surface.

Lithographic apparatus, and device manufacturing method

For all technologies, from flint arrowheads to DNA microarrays, patterning the functional material is crucial. For semiconductor integrated circuits (ICs), it is even more critical than for most technologies because enormous benefits accrue to going smaller, notably higher speed and much less energy consumed per computing function. The consensus is that ICs will continue to be manufactured until at least the ldquo22 nm noderdquo (the linewidth of an equal line-space pattern). Most patterning of ICs takes place on the wafer in two steps: (a) lithography, the patterning of a resist film on top of the functional material; and (b) transferring the resist pattern into the functional material, usually by etching. Here we concentrate on lithography. Optics has continued to be the chosen lithographic route despite its continually forecast demise. A combination of 193-nm radiation, immersion optics, and computer-intensive resolution enhancement technology will probably be used for the 45- and 32-nm nodes. Optical lithography usually requires that we first make a mask and then project the mask pattern onto a resist-coated wafer. Making a qualified mask, although originally dismissed as a ldquosupport technology,rdquo now represents a significant fraction of the total cost of patterning an IC largely because of the measures needed to push resolution so far beyond the normal limit of optical resolution. Thus, although optics has demonstrated features well below 22 nm, it is not clear that optics will be the most economical in this range; nanometer-scale mechanical printing is a strong contender, extreme ultraviolet is still the official front runner, and electron beam lithography, which has demonstrated minimum features less than 10 nm wide, continues to be developed both for mask making and for directly writing on the wafer (also known as ldquomaskless lithographyrdquo). Going from laboratory demonstration to manufacturing technology is enormously expensive ( $1 billion) and for good reason. Just in terms of data rate (mask pattern to resist pattern), today's exposure tools achieve about 10 Tb/s at an allowable error rate of about 1/h; this data rate will double with each generation. In addition, the edge placement precision required will soon be 30 parts per billion. There are so many opportunities for unacceptable performance that making the right decision goes far beyond understanding the underlying physical principles. But the benefits of continuing to be able to manufacture electronics at the 22-nm node and beyond appear to justify the investment, and there is no shortage of ideas on how to accomplish this.

Lithography and Other Patterning Techniques for Future Electronics

Extreme ultraviolet lithography (EUVL) was thoroughly reviewed over a broad range of topics, including history, tools, source, metrology, condenser and projection optics, resists, and masks. Since 1988, many studies on EUVL have been conducted in North America, Europe, and Japan, through state sponsored programs and industrial consortiums. To date, no “show stopper” has been identified, but challenges are present in almost all aspects of EUVL technology. Commercial alpha lithography step-and-scan tools are installed with full-field capability; however, EUVL power at intermediate focus (IF) has not yet met volume manufacturing requirements. Compared with the target of 180W IF power, current tools can supply only approximately 55–62W. EUV IF power has been improved gradually from xenon- to tin-discharge-produced plasma or laser-produced plasma. EUVL resist has improved significantly in the last few years, with 25nm 1:1 line/space resolution being produced with approximately 2.7nm (3σ) line edge roughness. A...

Extreme ultraviolet lithography: A review

For all technologies, from flint arrowheads to DNA microarrays, patterning the functional material is crucial. For semiconductor integrated circuits (ICs), it is even more critical than for most technologies because enormous benefits accrue to going smaller, notably higher speed and much less energy consumed per computing function. The consensus is that ICs will continue to be manufactured until at least theB22 nm node( (the linewidth of an equal line-space pattern). Most patterning of ICs takes place on the wafer in two steps: a) lithography, the patterning of a resist film on top of the functional material; and b) transferring the resist pattern into the functional material, usually by etching. Here we concentrate on lithography. Optics has continued to be the chosen lithographic route despite its continually forecast demise. A combination of 193-nm radia- tion, immersion optics, and computer-intensive resolution enhancement technology will probably be used for the 45- and 32-nm nodes. Optical lithography usually requires that we first make a mask and then project the mask pattern onto a resist-coated wafer. Making a qualified mask, although origi- nally dismissed as a Bsupport technology,( now represents a significant fraction of the total cost of patterning an IC largely because of the measures needed to push resolution so far beyond the normal limit of optical resolution. Thus, although optics has demonstrated features well below 22 nm, it is not clear that optics will be the most economical in this range; nanometer-scale mechanical printing is a strong contender, extreme ultraviolet is still the official front runner, and electron beam lithography, which has demonstrated minimum features less than 10 nm wide, continues to be developed both for mask making and for directly writing on the wafer (also known as Bmaskless lithography(). Going from laboratory demonstra- tion to manufacturing technology is enormously expensive (9 $1 billion) and for good reason. Just in terms of data rate (mask pattern to resist pattern), today's exposure tools achieve about 10 Tb/s at an allowable error rate of about 1/h; this data rate will double with each generation. In addition, the edge placement precision required will soon be 30 parts per billion. There are so many opportunities for unacceptable perfor- mance that making the right decision goes far beyond under- standing the underlying physical principles. But the benefits of continuing to be able to manufacture electronics at the 22-nm node and beyond appear to justify the investment, and there is no shortage of ideas on how to accomplish this.

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Lithography and Other Patterning Techniques for Future Electronics As integrated circuits continue to go smaller, laying down circuit patterns on semiconductor material becomes more expensive and new techniques are needed.

LPV control for a wafer stage: beyond the theoretical solution

Multivariable feedback control design for high-precision wafer stage motion

The ASML EUV alpha demo tool is operational! The alpha demo tool is a 0.25NA fully functional lithography tool with a field size of 26x33 mm 2 , enabling process development at the 40-nm technology node. In this paper we describe the tool performance, show that vacuum is achieved in a few hours, and demonstrate that our optics contamination strategy mitigates degradation of the optics. Additional data shows the Sn source cost-of-ownership to be comparable to state-of-the-art ArF source systems, by implementing a collector contamination mitigation strategy that includes cleaning. And, we present our first 35-nm dense lines and spaces (half pitch) resist images.

First performance results of the ASML alpha demo tool

By applying time-frequency analysis to a given standard iterative learning control or ILC an adaptive filter for the learned feed-forward loop is designed. This time varying filter varies according to the momentary frequency content of the error signal and allows to discriminate between areas of deterministic and stochastic error. Its application results in selective application of ILC to those intervals where error signals of high level are concentrated and allows application of a single ILC acquisition to different setpoint trajectories. The adaptive filter finds particular use in lithographic scanning systems where it is used for varying scan length.

Method of adaptive interactive learning control and a lithographic manufacturing process and apparatus employing such a method

Iterative Learning Control (ILC) is a known technique for improving the performance of systems or processes that operate repetitively over a fixed time interval. ILC generates a feedforward signal effective for providing good tracking control. However, there still exist a number of problems which hinder extensions of ILC schemes. The major obstacle is perhaps the requirement that the trajectory (or repetitive disturbance) must be strictly repeatable over operations. ILC has also liability to deal with stochastic effects. This paper presents the design and the implementation of a time-frequency adaptive ILC that is applicable for motion systems which execute the same kind of repetitive tasks. For the motion system, we show that the adaptive algorithm we propose leads to design one (learned) feed-forward signal suitable for different setpoints. We demonstrate that, when implementing time-frequency adaptive ILC, very good time performance (tracking errors) is obtained. The proposed algorithm converges faster than standard ILC. With time-frequency adaptive ILC noise amplification is reduced.

Iterative learning control for variable setpoints, applied to a motion system

A radiation spot measurement system for a lithographic apparatus, the system having a target onto which a radiation system of the lithographic apparatus may project spots of radiation for a measurement process, the target having a measurement target. The system further includes a radiation detector to detect radiation from one of the spots, and a controller to receive information from the radiation detector and to determine the position of the spot of radiation relative to an intended position of the spot of radiation.

Gregor van Baars

Papers

Multivariable feedback control design for high-precision wafer stage motion

First performance results of the ASML alpha demo tool

Method of adaptive interactive learning control and a lithographic manufacturing process and apparatus employing such a method

Iterative learning control for variable setpoints, applied to a motion system

Measurement of the position of a radiation beam spot in lithography