PURPOSE: A resistive random access memory device is provided to prevent sneak path problem by using a thin film structure which directly connects a bi-directional switching layer on a resistance change layer. CONSTITUTION: A first electrode(10) is formed on a thin film layer(20). The thin film layer includes a resistance change layer and a switching layer which are connected with each other. The resistance change layer includes materials with bipolar resistance switching characteristics. The switching layer includes materials with bi-directional switching characteristics. The thin film layer is formed on a second electrode(30).

Resistance random access memory

In today's society, displays are indispensable for digital interaction and personal contact. Therefore, the development of displays is an urgent need for the next generation. Leading the commercialization trends is the development of industrial, high-resolution, portable, and multifunctional displays. Moreover, for small-size portable displays, the most critical factor affecting future applications is their flexibility. Among the various materials that can act as the channel layer, low-temperature polycrystalline silicon (LTPS) is a potential candidate for next-generation portable displays, which require high resolution and stable reliability, and which can achieve virtual reality applications. This article is a review of the development of the LTPS thin-film transistors (TFTs) on soft and flexible electronics, especially the effect of mechanical strain. This article starts by providing an overview of the difficulties in fabricating LTPS TFTs on flexible substrates. The physical mechanism corresponding to each degradation caused by mechanical stress is presented next. Finally, to support the development of the flexible technologies and realize their commercialization, methods to overcome these mechanical strain-induced degradations are reported in three different aspects by understanding the physical degradation model.

Flexible low-temperature polycrystalline silicon thin-film transistors

Oxide semiconductors have been extensively studied as active channel layers of thin-film transistors (TFTs) for electronic applications. However, the field-effect mobility (μFE) of oxide TFTs is not sufficiently high to compete with that of low-temperature-processed polycrystalline-Si TFTs (50-100 cm2V-1s-1). Here, we propose a simple process to obtain high-performance TFTs, namely hydrogenated polycrystalline In2O3 (In2O3:H) TFTs grown via the low-temperature solid-phase crystallization (SPC) process. In2O3:H TFTs fabricated at 300 °C exhibit superior switching properties with µFE = 139.2 cm2V-1s-1, a subthreshold swing of 0.19 Vdec-1, and a threshold voltage of 0.2 V. The hydrogen introduced during sputter deposition plays an important role in enlarging the grain size and decreasing the subgap defects in SPC-prepared In2O3:H. The proposed method does not require any additional expensive equipment and/or change in the conventional oxide TFT fabrication process. We believe these SPC-grown In2O3:H TFTs have a great potential for use in future transparent or flexible electronics applications. 

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High-mobility hydrogenated polycrystalline In2O3 (In2O3:H) thin-film transistors

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Amorphous indium gallium zinc oxide (IGZO) deposited by plasma-enhanced atomic layer deposition (PEALD) thin-film transistors (TFTs) was fabricated using SiO2 gate insulators synthesized via plasma-enhanced chemical vapor deposition (PECVD, device A) or PEALD (device B). The electrical performance of B devices was higher than that of device A. The mobilities of A and B devices were 19.39 and 21.11 cm2/Vs, and the subthreshold slopes were 0.25 and 0.22 V /decade, respectively. In addition, the device reliability of A devices shows an abnormal threshold voltage ( ${V}_{\text {th}}$ ) shift of –1.25 V under positive bias temperature stress (PBTS), caused by hydrogen diffusion from the gate insulator to the channel region near the source/drain electrode. However, B devices had a normal ${V}_{\text {th}}$ shift of +2.87 V. X-ray photoelectron spectroscopy (XPS) and Fourier-transform infrared spectroscopy (FT-IR) results showed that PECVD SiO2 has a large amount of hydrogen bonding, such as Si-OH, compared to PEALD SiO2. Rutherford backscattering spectroscopy (RBS) and elastic recoil detection (ERD) measurement results confirmed that the hydrogen content of PECVD SiO2 was 2.24%, whereas that of PEALD SiO2 was lower at 1.45%.

Hydrogen Impacts of PEALD InGaZnO TFTs Using SiO x Gate Insulators Deposited by PECVD and PEALD

This work demonstrates the generation of abnormal capacitance for amorphous indium-gallium-zinc oxide (a-InGaZnO4) thin-film transistors after being subjected to negative bias stress under ultraviolet light illumination stress (NBIS). At various operation frequencies, there are two-step tendencies in their capacitance-voltage curves. When gate bias is smaller than threshold voltage, the measured capacitance is dominated by interface defects. Conversely, the measured capacitance is dominated by oxygen vacancies when gate bias is larger than threshold voltage. The impact of these interface defects and oxygen vacancies on capacitance-voltage curves is verified by TCAD simulation software.

Abnormal hump in capacitance-voltage measurements induced by ultraviolet light in a-IGZO thin-film transistors

In this study, the impact of moisture on the electrical characteristics of an amorphous In-Ga-Zn-O thin-film transistor (a-IGZO TFT) was investigated. In commercial applications of such TFTs, high stability and quality performance in humid environments are essential. During TFT operation under ambient moisture, the electrolysis of water molecules occurs via the tip electric field effect. Hydrogen diffuses from the etch-stop layer or back-channel into the main channel under a negative electric field. The hydrogen atoms act as shallow donors (which causes the carrier concentration in the channel to rise), causing the threshold voltage (VTH) to shift in the negative direction. Hydrogen diffusion from the overlap of the source/drain and gate electrodes to the channel center caused by the tip electric field induces a significant barrier lowering and VTH shifts in a short-channel device. However, under negative bias stress (NBS) in ambient moisture, the negative VTH shift is more obvious in short- than in long-channel devices, indicating suppressed hydrogen diffusion in long-channel devices. This is attributed to the electrolysis of water by the tip electric field at the source, drain, and gate electrodes, which causes hydrogen to diffuse to the center of the channel. Here, a novel physical model of the capacitance-voltage (C-V) electrical property changes under ambient moisture is proposed, based on the early appearance of abnormalities in the C-V measurements. The electrolysis of water caused by the tip electric field and electrical abnormalities caused by hydrogen diffusion into the a-IGZO active layer are explained by this model. A secondary-ion mass spectrometry analysis shows that hydrogen content in the channel generally increases under NBS in ambient moisture. The degradation behavior due to moisture in a-IGZO is clarified. Thus, inhibiting the tip electric field may benefit future flexible-display and gas-sensing applications.

Investigation of the Capacitance-Voltage Electrical Characteristics of Thin-Film Transistors Caused by Hydrogen Diffusion under Negative Bias Stress in a Moist Environment

This study introduces a cyclical annealing technique that enhances the reliability of amorphous indium-gallium-zinc-oxide (a-IGZO) via-type structure thin film transistors (TFTs). By utilizing this treatment, negative gate-bias illumination stress (NBIS)-induced instabilities can be effectively alleviated. The cyclical annealing provides several cooling steps, which are exothermic processes that can form stronger ionic bonds. An additional advantage is that the total annealing time is much shorter than when using conventional long-term annealing. With the use of cyclical annealing, the reliability of the a-IGZO can be effectively optimized, and the shorter process time can increase fabrication efficiency.

Guan Fu Chen

Papers

Flexible low-temperature polycrystalline silicon thin-film transistors

Abnormal hump in capacitance-voltage measurements induced by ultraviolet light in a-IGZO thin-film transistors

Investigation of the Capacitance-Voltage Electrical Characteristics of Thin-Film Transistors Caused by Hydrogen Diffusion under Negative Bias Stress in a Moist Environment

Cyclical Annealing Technique To Enhance Reliability of Amorphous Metal Oxide Thin Film Transistors