H
Hitoshi Shiga
Researcher at Toshiba
Publications - 62
Citations - 1795
Hitoshi Shiga is an academic researcher from Toshiba. The author has contributed to research in topics: Semiconductor memory & Sense amplifier. The author has an hindex of 18, co-authored 62 publications receiving 1718 citations.
Papers
More filters
Journal ArticleDOI
A CMOS bandgap reference circuit with sub-1-V operation
TL;DR: In this paper, the authors proposed a CMOS bandgap reference (BGR) circuit, which can successfully operate with sub-1-V supply, and measured V/sub ref/ is 518/spl plusmn/15 mV (3/spl sigma/) for 23 samples on the same wafer at 27-125/spl deg/C.
Proceedings ArticleDOI
A CMOS band-gap reference circuit with sub 1 V operation
TL;DR: In this article, a CMOS band-gap reference (BGR) circuit with sub-1 V output voltage was proposed, where the output voltage is the sum of the built-in voltage of the diode, Vf, and the thermal voltage, VT, of kT/q multiplied by a constant.
Journal ArticleDOI
A 56-nm CMOS 99- ${\hbox {mm}}^{2} $ 8-Gb Multi-Level NAND Flash Memory With 10-MB/s Program Throughput
Ken Takeuchi,Y. Kameda,Susumu Fujimura,H. Otake,Koji Hosono,Hitoshi Shiga,Yohji Watanabe,Takuya Futatsuyama,Yoshihiko Shindo,M. Kojima,Makoto Iwai,Masanobu Shirakawa,Masayuki Ichige,K. Hatakeyama,Sumio Tanaka,Teruhiko Kamei,Jia-Yi Fu,A. Cernea,Yan Li,Masaaki Higashitani,G. Hemink,Shinji Sato,Ken Oowada,Shih-Chung Lee,N. Hayashida,Jun Wan,Jeffrey W. Lutze,Shouchang Tsao,Mehrdad Mofidi,Kiyofumi Sakurai,Naoya Tokiwa,H. Waki,Y. Nozawa,K. Kanazawa,Shigeo Ohshima +34 more
TL;DR: A single 3.3-V only, 8-Gb NAND flash memory with the smallest chip to date, 98.8 mm2, has been successfully developed and the program throughput is drastically improved to twice as large as previously reported and comparable to binary memories.
Proceedings ArticleDOI
A 56nm CMOS 99mm2 8Gb Multi-level NAND Flash Memory with 10MB/s Program Throughput
Ken Takeuchi,Y. Kameda,Susumu Fujimura,H. Otake,Koji Hosono,Hitoshi Shiga,Yohji Watanabe,Takuya Futatsuyama,Yoshihiko Shindo,M. Kojima,Makoto Iwai,Masanobu Shirakawa,Masayuki Ichige,K. Hatakeyama,S. Tanaka,Teruhiko Kamei,Jia-Yi Fu,A. Cernea,Yan Li,M. Higashitani,G. Hemink,Shinji Sato,Ken Oowada,Shih-Chung Lee,N. Hayashida,Jun Wan,Jeffrey W. Lutze,Shouchang Tsao,Mehrdad Mofidi,Kiyofumi Sakurai,Naoya Tokiwa,H. Waki,Y. Nozawa,K. Kanazawa,Shigeo Ohshima +34 more
TL;DR: The 10MB/s programming and 93ms block copy are realized by introducing 8kB page, noise-cancellation circuits, external page copy and the dual VDD scheme enabling efficient use of 1MB blocks.
Patent
Memory system having nonvolatile semiconductor memories
Hitoshi Shiga,Masahiro Yoshihara +1 more
TL;DR: In this article, a memory system includes a first nonvolatile semiconductor memory, a second non-volatile memory and a controller, and the controller controls the first operation and the second operation of the first memory.