Showing papers by "Iouliia Skliarova published in 2010"

Parallel FPGA-Based Implementation of Recursive Sorting Algorithms

Abstract: The paper describes the hardware implementation and optimization of parallel recursive algorithms that sort data using binary trees. Since recursive calls are not directly supported by hardware description languages, they are implemented using the model of a hierarchical finite state machine (HFSM). Parallel processing is achieved by constructing N binary trees (N>1) and applying concurrent sorting to N trees at the same time with the aid of N communicating HFSMs. The paper presents new results in: 1) parallel sorting algorithms, 2) FPGA-based parallel architectures, and 3) the analysis and comparison of alternative and competitive techniques for implementing parallel recursive algorithms. Experiments demonstrate that the performance of sorting operations is increased compared to previous implementations.

Hardware implementation of recursive algorithms

Abstract: The paper presents new results in the hardware implementation and optimization of recursive sequential and parallel algorithms using the known and a new model of a hierarchical finite state machine. Applicability and advantages of the proposed methods are confirmed through numerous examples of the designed hardware circuits that have been analyzed and compared. The results of experiments and FPGA-based prototyping demonstrate clearly that the proposed innovations enable the required hardware resources to be decreased achieving at the same time better performance of recursive sorting algorithms compared to known implementations both in hardware and in software.

Reconfigurable Digital Audio Mixer for Electroacoustic Music

Abstract: Sound diffusion techniques are currently widely employed in the modern music allowing new composition styles and sound movement scenarios to be developed. Multichannel sound diffusion systems are built so as to provide the user with an opportunity to independently control several input channels through the desired output channels. The system MIAUDIO described in the paper allows using up to 8 input channels that can be mixed in real-time through 32 output speakers. The core part of the system which performs the desired audio mixture algorithm was implemented in a Spartan-3E Field Programmable Gate Array (FPGA). The mixture parameters are supplied by a host computer communicating with the FPGA via USB port. The complete system was successfully implemented and tested. The resulting solution has very low cost and was developed in relatively short time.

Optimization of FPGA-based circuits for recursive data sorting

Abstract: The paper describes sequential and parallel methods of recursive data sorting that are applied to binary trees. Hardware circuits implementing these methods are based on the model of a hierarchical finite state machine, which provides support for recursion in hardware. It is shown that the considered technique allows the known optimization methods for conventional state machines to be applied directly. The described circuits have been implemented in commercial FPGAs and tested in numerous examples. Analysis and comparison of alternative and competitive techniques is also done in the paper.

Application-specific hardware accelerator for implementing recursive sorting algorithms

Abstract: The paper is dedicated to hardware accelerators for data sorting using tree-based recursive algorithms. Since recursive calls are not directly supported by hardware description languages, they are implemented using the model of a hierarchical finite state machine. The paper presents new results in: 1) computational models and hardware architectures; 2) optimization and parallel execution of recursive sorting algorithms; 3) the analysis and comparison of alternative and competitive techniques for implementation of recursive sorting algorithms both in hardware and software. Experiments with the proposed FPGA-based hardware accelerators demonstrate that the performance of sorting operations is increased compared to known implementations.

Reconfiguration technique for adaptive embedded systems

Abstract: This paper is dedicated to the design and implementation of adaptive embedded systems. Different synthesis methodologies are presented and discussed. Applying such methodologies the synthesis of circuits with support for modifiability and extensibility can be done. The paper describes: 1) specification of control algorithms for adaptive embedded systems and formal conversion of the specification to synthesizable VHDL code; 2) a model that is called a hierarchical finite state machine, which provides support for modularity, hierarchy, and recursion; 3) VHDL templates enabling the circuit to be synthesized in commercial CAD systems; and 4) the results of experiments.

Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules

Abstract: The paper describes a hierarchical finite state machine (HFSM) with implicit modules, which inherits capabilities of existing models (in particular, provides support for modularity, hierarchy, and recursion), requires a very simple stack memory, and permits optimization methods developed for conventional FSMs to be reused. The HFSM has been tested in several practical applications briefly characterized in the paper. It is shown that the same hardware can implement different algorithms through the proposed reconfiguration technique. The results of experiments, reported in the paper, clearly demonstrate advantages of the proposed model.

E-learning tools and remote reconfigurable systems for engineering education

Abstract: This paper presents an original approach proposed and successfully used in University of Aveiro and targeted to advance e-learning tools and remote laboratories for state-of-the-art engineering education. Nowadays, reconfigurable systems, in general, and FPGA (field-programmable gate array) based systems, in particular, constitute an essential part of engineering practice. The respective professional trends are, however, not reflected accordingly in contemporary engineering education curricula. The paper argues importance of reconfigurable systems in education and proposes effective learning methods and tools, which include laboratory templates, animated tutorials, education-oriented examples, a remotely reconfigurable prototyping system, and a virtual software/reconfigurable hardware co-simulation environment.

Optimization of recursive sorting algorithms for implementation in hardware

Abstract: The paper describes the hardware implementation and optimization of recursive algorithms that sort data using binary trees Since recursive calls are not directly supported by hardware description languages, they are implemented using the known model of a hierarchical finite state machine (HFSM) The paper suggests new hardware-oriented recursive algorithms, describes their implementation in hardware; reports the results of numerous experiments; provides analysis and comparison of alternative and competitive techniques The results clearly demonstrate that performance of sorting operations is increased comparing to other known implementations