Physical Review B

For 50 years the exponential rise in the power of electronics has been fuelled by an increase in the density of silicon complementary metal-oxide-semiconductor (CMOS) transistors and improvements to their logic performance. But silicon transistor scaling is now reaching its limits, threatening to end the microelectronics revolution. Attention is turning to a family of materials that is well placed to address this problem: group III-V compound semiconductors. The outstanding electron transport properties of these materials might be central to the development of the first nanometre-scale logic transistors.

Nanometre-scale electronics with III–V compound semiconductors

Graphene has attracted considerable interest as a potential new electronic material. With its high carrier mobility, graphene is of particular interest for ultrahigh-speed radio-frequency electronics. However, conventional device fabrication processes cannot readily be applied to produce high-speed graphene transistors because they often introduce significant defects into the monolayer of carbon lattices and severely degrade the device performance. Here we report an approach to the fabrication of high-speed graphene transistors with a self-aligned nanowire gate to prevent such degradation. A Co(2)Si-Al(2)O(3) core-shell nanowire is used as the gate, with the source and drain electrodes defined through a self-alignment process and the channel length defined by the nanowire diameter. The physical assembly of the nanowire gate preserves the high carrier mobility in graphene, and the self-alignment process ensures that the edges of the source, drain and gate electrodes are automatically and precisely positioned so that no overlapping or significant gaps exist between these electrodes, thus minimizing access resistance. It therefore allows for transistor performance not previously possible. Graphene transistors with a channel length as low as 140 nm have been fabricated with the highest scaled on-current (3.32 mA μm(-1)) and transconductance (1.27 mS μm(-1)) reported so far. Significantly, on-chip microwave measurements demonstrate that the self-aligned devices have a high intrinsic cut-off (transit) frequency of f(T) = 100-300 GHz, with the extrinsic f(T) (in the range of a few gigahertz) largely limited by parasitic pad capacitance. The reported intrinsic f(T) of the graphene transistors is comparable to that of the very best high-electron-mobility transistors with similar gate lengths.

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High-speed graphene transistors with a self-aligned nanowire gate

Owing to its high carrier mobility and saturation velocity, graphene has attracted enormous attention in recent years1, 2, 3, 4, 5. In particular, high-performance graphene transistors for radio-frequency (r.f.) applications are of great interest6, 7, 8, 9, 10, 11, 12, 13. Synthesis of large-scale graphene sheets of high quality and at low cost has been demonstrated using chemical vapour deposition (CVD) methods14. However, very few studies have been performed on the scaling behaviour of transistors made from CVD graphene for r.f. applications, which hold great potential for commercialization. Here we report the systematic study of top-gated CVD-graphene r.f. transistors with gate lengths scaled down to 40 nm, the shortest gate length demonstrated on graphene r.f. devices. The CVD graphene was grown on copper film and transferred to a wafer of diamond-like carbon. Cut-off frequencies as high as 155 GHz have been obtained for the 40-nm transistors, and the cut-off frequency was found to scale as 1/(gate length). Furthermore, we studied graphene r.f. transistors at cryogenic temperatures. Unlike conventional semiconductor devices where low-temperature performance is hampered by carrier freeze-out effects, the r.f. performance of our graphene devices exhibits little temperature dependence down to 4.3 K, providing a much larger operation window than is available for conventional devices.

High-frequency, scaled graphene transistors on diamond-like carbon

The discovery of graphene has ignited intensive interest in two-dimensional layered materials (2DLMs). These 2DLMs represent a new class of nearly ideal 2D material systems for exploring fundamental chemistry and physics at the limit of single-atom thickness, and have the potential to open up totally new technological opportunities beyond the reach of existing materials. In general, there are a wide range of 2DLMs in which the atomic layers are weakly bonded together by van der Waals interactions and can be isolated into single or few-layer nanosheets. The van der Waals interactions between neighboring atomic layers could allow much more flexible integration of distinct materials to nearly arbitrarily combine and control different properties at the atomic scale. The transition metal dichalcogenides (TMDs) (e.g., MoS2, WSe2) represent a large family of layered materials, many of which exhibit tunable band gaps that can undergo a transition from an indirect band gap in bulk crystals to a direct band gap in monolayer nanosheets. These 2D-TMDs have thus emerged as an exciting class of atomically thin semiconductors for a new generation of electronic and optoelectronic devices. Recent studies have shown exciting potential of these atomically thin semiconductors, including the demonstration of atomically thin transistors, a new design of vertical transistors, as well as new types of optoelectronic devices such as tunable photovoltaic devices and light emitting devices. In parallel, there have also been considerable efforts in developing diverse synthetic approaches for the rational growth of various forms of 2D materials with precisely controlled chemical composition, physical dimension, and heterostructure interface. Here we review the recent efforts, progress, opportunities and challenges in exploring the layered TMDs as a new class of atomically thin semiconductors.

Two-dimensional transition metal dichalcogenides as atomically thin semiconductors: opportunities and challenges

The change in refractive index Delta n produced by injection of free carriers in InP, GaAs, and InGaAsP is theoretically estimated. Bandfilling (Burstein-Moss effect), bandgap shrinkage, and free-carrier absorption (plasma effect) are included. Carrier concentrations of 10/sup 16//cm/sup 3/ to 10/sup 19//cm/sup 3/ and photon energies of 0.8 to 2.0 eV are considered. Predictions for Delta n are in reasonably good agreement with the limited experimental data available. Refractive index changes as large as 10/sup -2/ are predicted for carrier concentrations of 10/sup 8//cm/sup 3/ suggested that low-loss optical phase modulators and switches using carrier injection are feasible in these materials. >

Carrier-induced change in refractive index of InP, GaAs and InGaAsP

GaN HEMT reliability

Trapping is one of the most deleterious effects that limit performance and reliability in GaN HEMTs. In this paper, we present a methodology to study trapping characteristics in GaN HEMTs that is based on current-transient measurements. Its uniqueness is that it is amenable to integration with electrical stress experiments in long-term reliability studies. We present the details of the measurement and analysis procedures. With this method, we have investigated the trapping and detrapping dynamics of GaN HEMTs. In particular, we examined layer location, energy level, and trapping/detrapping time constants of dominant traps. We have identified several traps inside the AlGaN barrier layer or at the surface close to the gate edge and in the GaN buffer.

http://www.mtl.mit.edu/~alamo/pdf/2011/RJ-128.pdf

A Current-Transient Methodology for Trap Analysis for GaN High Electron Mobility Transistors

A simple three-terminal technique for measuring the off-state breakdown voltage of FETs is presented. With the source grounded, current is injected into the drain of the on-state device. The gate is then ramped down to shut the device off. In this process, the drain-source voltage rises to a peak and then drops. This peak represents an unambiguous definition of three-terminal breakdown voltage. In the same scan, a measurement of the two-terminal gate-drain breakdown voltage is also obtained. The method offers potential for use in a manufacturing environment, as it is fully automatable. It also enables easy measurement of breakdown voltage in unstable and fragile devices. >

A new drain-current injection technique for the measurement of off-state breakdown voltage in FETs

We report on InAs pseudomorphic high-electron mobility transistors (PHEMTs) on an InP substrate with record cutoff frequency characteristics. This result was achieved by paying attention to minimizing resistive and capacitive parasitics and improving short-channel effects, which play a key role in high-frequency response. Toward this, the device design features a very thin channel and is fabricated through a three-step recess process that yields a scaled-down barrier thickness. A 30-nm InAs PHEMT with t ins = 4 nm and t ch = 10 nm exhibits excellent g m, max of 1.62 S/mm, f T of 628 GHz, and f max of 331 GHz at V DS = 0.6 V . To the knowledge of the authors, the obtained f T is the highest ever reported in any FET on any material system. In addition, a 50-nm device shows the best combination of f T= 557 GHz and f max = 718 GHz of any transistor technology.

J.A. del Alamo

Papers

Carrier-induced change in refractive index of InP, GaAs and InGaAsP

GaN HEMT reliability

A Current-Transient Methodology for Trap Analysis for GaN High Electron Mobility Transistors

A new drain-current injection technique for the measurement of off-state breakdown voltage in FETs

30-nm InAs Pseudomorphic HEMTs on an InP Substrate With a Current-Gain Cutoff Frequency of 628 GHz