Spintronics, or spin electronics, involves the study of active control and manipulation of spin degrees of freedom in solid-state systems. This article reviews the current status of this subject, including both recent advances and well-established results. The primary focus is on the basic physical principles underlying the generation of carrier spin polarization, spin dynamics, and spin-polarized transport in semiconductors and metals. Spin transport differs from charge transport in that spin is a nonconserved quantity in solids due to spin-orbit and hyperfine coupling. The authors discuss in detail spin decoherence mechanisms in metals and semiconductors. Various theories of spin injection and spin-polarized transport are applied to hybrid structures relevant to spin-based devices and fundamental studies of materials properties. Experimental work is reviewed with the emphasis on projected applications, in which external electric and magnetic fields and illumination by light will be used to control spin and charge dynamics to create new functionalities not feasible or ineffective with conventional electronics.

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Spintronics: Fundamentals and applications

http://files.janapv.webnode.cz/200000097-8a03f8afdf/ex_bias_nano.pdf

Exchange bias in nanostructures

We survey recent developments in the design of large-capacity content-addressable memory (CAM). A CAM is a memory that implements the lookup-table function in a single clock cycle using dedicated comparison circuitry. CAMs are especially popular in network routers for packet forwarding and packet classification, but they are also beneficial in a variety of other applications that require high-speed table lookup. The main CAM-design challenge is to reduce power consumption associated with the large amount of parallel active circuitry, without sacrificing speed or memory density. In this paper, we review CAM-design techniques at the circuit level and at the architectural level. At the circuit level, we review low-power matchline sensing techniques and searchline driving approaches. At the architectural level we review three methods for reducing power consumption.

https://www.pagiamtzis.com/pubs/pagiamtzis-jssc2006.pdf

Content-addressable memory (CAM) circuits and architectures: a tutorial and survey

Non-volatile 'flash' memories are key components of integrated circuits because they retain their data when power is interrupted. Despite their great commercial success, the semiconductor industry is searching for alternative non-volatile memories with improved performance and better opportunities for scaling down the size of memory cells. Here we demonstrate the feasibility of a new semiconductor memory concept. The individual memory cell is based on a narrow line of phase-change material. By sending low-power current pulses through the line, the phase-change material can be programmed reversibly between two distinguishable resistive states on a timescale of nanoseconds. Reducing the dimensions of the phase-change line to the nanometre scale improves the performance in terms of speed and power consumption. These advantages are achieved by the use of a doped-SbTe phase-change material. The simplicity of the concept promises that integration into a logic complementary metal oxide semiconductor (CMOS) process flow might be possible with only a few additional lithographic steps.

Low-cost and nanoscale non-volatile memory concept for future silicon chips.

We describe the operation of, and demonstrate logic functionality in, networks of physically coupled, nanometer-scale magnets designed for digital computation in magnetic quantum-dot cellular automata (MQCA) systems. MQCA offer low power dissipation and high integration density of functional elements and operate at room temperature. The basic MQCA logic gate, that is, the three-input majority logic gate, is demonstrated.

/pdf/majority-logic-gate-for-magnetic-quantum-dot-cellular-4pab5ag4pu.pdf

Majority Logic Gate for Magnetic Quantum-Dot Cellular Automata

Magnetoresistive random access memory (MRAM) technology combines a spintronic device with standard silicon-based microelectronics to obtain a combination of attributes not found in any other memory technology. Key attributes of MRAM technology are nonvolatility and unlimited read and write endurance. Magnetic tunnel junction (MTJ) devices have several advantages over other magnetoresistive devices for use in MRAM cells, such as a large signal for the read operation and a resistance that can be tailored to the circuit. Due to these attributes, MTJ MRAM can operate at high speed and is expected to have competitive densities when commercialized. In this paper, we review our recent progress in the development of MTJ-MRAM technology. We describe how the memory operates, including significant aspects of reading, writing, and integration of the magnetic material with CMOS, which enabled our recent demonstration of a 1-Mbit memory chip. Important memory attributes are compared between MRAM and other memory technologies.

Magnetoresistive random access memory using magnetic tunnel junctions

We summarize our progress on Magnetoresistive Random Access Memory (MRAM) based on Magnetic Tunnel Junctions (MTJ). We have demonstrated MTJ material in the 1-1000 k/spl Omega/-/spl mu/m/sup 2/ range with MR values above 40%. The switching characteristics are mainly governed by the magnetic shape anisotropy that arises from the element boundaries. The switching repeatability, as well as hard axis selectability, are shown to be dependent on both shape and aspect ratio. MTJ memory elements were successfully integrated with 0.6 /spl mu/m CMOS technology, achieving read and program address access times of 14 ns in a 256/spl times/2 MRAM.

Recent developments in magnetic tunnel junction MRAM

Rapid advances in portable communication and computing systems are creating an increasing demand for nonvolatile random access memory that is both high-density and highspeed. Existing solid-state technologies are unable to provide all of the needed attributes in a single memory solution. Therefore, a number of different memories are currently being used to achieve the multiple functionality requirements, often compromising performance and adding cost to the system. A new technology, magnetoresistive random access memory (MRAM) based on magnetoresistive tunneling, has the potential to replace these memories in various systems with a single, universal solution. The key attributes of MRAM are nonvolatility, high-speed operation. and unlimited read and write endurance. This technology is enabled by the ability to deposit high-quality, nanometer scale tunneling barriers that display enhanced magnetoresistive response. In this article we describe several fundamental technical and scientific aspects of MRAM with emphasis on recent accomplishments that enabled our successful demonstration of a 256-Kb memory chip.

The science and technology of magnetoresistive tunneling memory

A spin torque magnetoresistive random access memory (ST-MRAM) holds great promise to be a fast, high density, nonvolatile memory that can enhance the performance of a variety of applications, particularly when used as a non-volatile buffer in data storage devices and systems. Towards that end, we have developed a fully functional 64 Mb DDR3 ST-MRAM built on 90 nm CMOS technology. The memory is organized in an 8-bank configuration that can sustain 1.6 GigaTransfers/s (DDR3-1600). We have run standard memory tests, such as a March6N pattern, on the full 64 Mb at 800 MHz with 0 fails for greater than 10 5 cycles. Full functionality was also verified from 0°C to 70°C with no significant change in performance. The bits are magnetic tunnel junctions (MTJs) having an MgO tunnel barrier and a magnetic free layer made of a CoFeB-based alloy with an in-plane magnetization, but with an out-of-plane anisotropy reduced by more than 50% due to an enhanced perpendicular surface anisotropy. To enable the 64 Mb performance, we developed an MTJ stack that has low switching voltage (Vsw), high breakdown voltage (Vbd), and excellent switching reliability with tight distributions. The ST switching distribution has σ ≈ 10%, and we found excellent agreement with a single Gaussian distribution down to an error rate . For our optimized material, the Vsw/Vbd ≈ 0.3, and the separation between Vsw and Vbd is ≈ 25σ. The energy barrier to magnetization reversal (Eb) was characterized using both time-dependent coercivity and higher temperature to accelerate reversal. We found the average Eb ≈ 70kbT.

A Fully Functional 64 Mb DDR3 ST-MRAM Built on 90 nm CMOS Technology

Developments in portable communication and computing systems are creating a growing demand for nonvolatile random access memory that is dense and fast. None of the existing solid-state memories can provide all the needed attributes in a single memory solution. Therefore, to achieve the required multiple functionality requirements, a number of different memories are being used while compromising performance and adding cost to the system. Magnetoresistive Random Access Memory (MRAM) has the potential to replace these memories in various systems with a single, universal memory solution. Key attributes of MRAM technology are nonvolatility and unlimited read and write endurance. In addition, MRAM can operate at high-speed and is expected to have competitive densities. In this paper we describe several fundamental technical and scientific aspects of MRAM with emphasis on recent accomplishments that enabled our successful demonstration of a 256 kbit memory chip.

J. Janesky

Papers

Magnetoresistive random access memory using magnetic tunnel junctions

Recent developments in magnetic tunnel junction MRAM

The science and technology of magnetoresistive tunneling memory

A Fully Functional 64 Mb DDR3 ST-MRAM Built on 90 nm CMOS Technology

Fundamentals of MRAM Technology