A technique that combines the high-frequency behavior of a single-stage op amp with the high DC gain of a multistage design is presented. This technique is based on the concept that a very high DC gain can be achieved in combination with any unity-gain frequency achievable by a (folded-) cascode design. Bode-plot measurements for an op amp realized in a 1.6- mu m process show a DC gain of 90 dB and a unity-gain frequency of 116 MHz (16-pF load). Settling measurements with a feedback factor of 1/3 show a fast single-pole settling behavior corresponding to a closed-loop bandwidth of 18 MHz (35-pF load) and a settling accuracy better than 0.03%. This technique does not cause any loss in output voltage swing. At a supply voltage of 5.0 V an output swing of about 4.2 V is achieved without loss in DC gain. The above advantages are achieved with a 30% increase in chip area and a 15% increase in power consumption. >

A fast-settling CMOS op amp for SC circuits with 90-dB DC gain

Basic properties of the operational transconductance amplifier (OTA) are discussed. Applications of the OTA in voltage-controlled amplifiers, filters, and impedances are presented. A versatile family of voltage-controlled filter sections suitable for systematic design requirements is described. The total number of components used in these circuits is small, and the design equations and voltage-control characteristics are attractive. Limitations as well as practical considerations of OTA-based filters using commercially available bipolar OTAs are discussed. Applications of OTAs in continuous-time monolithic filters are considered.

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Active filter design using operational transconductance amplifiers: A tutorial

This survey presents an overview of recent advances in the state of the art for computer-aided design (CAD) tools for analog and mixed-signal integrated circuits (ICs). Analog blocks typically constitute only a small fraction of the components on mixed-signal ICs and emerging systems-on-a-chip (SoC) designs. But due to the increasing levels of integration available in silicon technology and the growing requirement for digital systems to communicate with the continuous-valued external world, there is a growing need for CAD tools that increase the design productivity and improve the quality of analog integrated circuits. This paper describes the motivation and evolution of these tools and outlines progress on the various design problems involved: simulation and modeling, symbolic analysis, synthesis and optimization, layout generation, yield analysis and design centering, and test. This paper summarizes the problems for which viable solutions are emerging and those which are still unsolved.

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Computer-aided design of analog and mixed-signal integrated circuits

We describe a new method for determining component values and transistor dimensions for CMOS operational amplifiers (op-amps). We observe that a wide variety of design objectives and constraints have a special form, i.e., they are posynomial functions of the design variables. As a result, the amplifier design problem can be expressed as a special form of optimization problem called geometric programming, for which very efficient global optimization methods have been developed. As a consequence we can efficiently determine globally optimal amplifier designs or globally optimal tradeoffs among competing performance measures such as power, open-loop gain, and bandwidth. Our method, therefore, yields completely automated sizing of (globally) optimal CMOS amplifiers, directly from specifications. In this paper, we apply this method to a specific widely used operational amplifier architecture, showing in detail how to formulate the design problem as a geometric program. We compute globally optimal tradeoff curves relating performance measures such as power dissipation, unity-gain bandwidth, and open-loop gain. We show how the method can he used to size robust designs, i.e., designs guaranteed to meet the specifications for a variety of process conditions and parameters.

/pdf/optimal-design-of-a-cmos-op-amp-via-geometric-programming-4thsejbwi6.pdf

Optimal design of a CMOS op-amp via geometric programming

Presents an overview of current design techniques for operational amplifiers implemented in CMOS and NMOS technology at a tutorial level. Primary emphasis is placed on CMOS amplifiers because of their more widespread use. Factors affecting voltage gain, input noise, offsets, common mode and power supply rejection, power dissipation, and transient response are considered for the traditional bipolar-derived two-stage architecture. Alternative circuit approaches for optimization of particular performance aspects are summarized, and examples are given.

MOS operational amplifier design-a tutorial overview

A design system has been developed which is able to design transconductance amplifiers, operational amplifiers, low-noise BIMOS amplifiers, voltage and current references, quartz oscillators, comparators, and oversampled A/D converters including their digital decimation filter starting from building-block and technology specifications. This design system, called Interactive Design for Analog Circuits (IDAC), is able to size a library of analog schematics (actually more than 40) as a function of technology (p-well and n-well CMOS) and desired building-block specifications. IDAC also generates a complete data sheet, an input file for SPICE2, and an input file for the analog layout program ILAC.

IDAC: an interactive design tool for analog CMOS circuits

Two transconductance amplifiers are presented in which the concept of an input dependent bias current has been introduced. As a result, these amplifiers combine a very low standby power dissipation with a high driving capability. The first amplifier, suited for SC filters, is fairly small (0.075 mm/SUP 2/) and has a slew rate which is more than an order of magnitude better than micropower amplifiers presented earlier. The second amplifier can be used as a micropower buffer. Nearly the whole supply current is used to charge the load capacitor so that this amplifier has a high efficiency.

Adaptive biasing CMOS amplifiers

An analog circuit design environment and its key features are presented These are multifunctionality, advanced modeling, novel simulation approaches, general sizing algorithms, hierarchy, and automatic and interactive layout generation capabilities Also, several developments in the field of analog design automation are discussed >

Towards an analog system design environment

A CMOS analog design expert system able to generate device dimensions and bias current for a library of transconductance and operational amplifiers, voltage references, quartz oscillators, low noise BiMOS amplifiers and oversampling ADC, will be reported.

http://ieeexplore.ieee.org/iel6/8303/25935/01157180.pdf

An analog expert design system

A transconductance amplifier is presented, in which the concept of a variable bias current has been introduced. The bias current is a function of the input signal. This amplifier has a very low standby power dissipation and a high driving capability.

J. Rijmenants

Papers

IDAC: an interactive design tool for analog CMOS circuits

Adaptive biasing CMOS amplifiers

Towards an analog system design environment

An analog expert design system

CMOS Adaptive Biasing Amplifier