Jahnavi Sharma

TL;DR: In this paper, the authors present design guidelines for thru-reflect-line vector-network-analyzer calibration kits used for characterizing circuits and transistors fabricated on silicon integrated circuits at millimeter-wave frequencies.

TL;DR: In this paper, a maximum-gain ring oscillator (MGRO) topology was proposed to maximize the power gain achieved by the active devices in a ring oscillators using appropriately designed passive matching networks to maximize frequency of oscillation.

TL;DR: A new dividerless Type-I sampling PLL, called the RS-PLL, which estimates the voltage-controlled oscillator (VCO) phase error by sampling the reference sine wave with a VCO square wave is demonstrated, and improves upon the simultaneous noise and spur performance achieved by current state-of-the-art clock multipliers.

TL;DR: In this paper, the first optical phased array with half-wavelength emitter pitch was demonstrated using index-mismatched waveguides and showed operation without grating lobes over an entire 180° field of view.

TL;DR: In this article, the authors compare on-wafer through-reflect-line (TRL) and short-open-load-thru (SOLT) and LRRM probe-tip calibrations for amplifier characterization and parasitic extraction for transistor characterization on silicon integrated circuits at millimeter-wave frequencies.